1 -- Package of jtag support code from the Chips4Makers project
3 use ieee.std_logic_1164.ALL;
6 type SRIOMODE_TYPE is (
7 SR_Through, -- Connect core signal to pad signals
8 SR_2Pad, -- Connect BD to pad
9 SR_2Core, -- Connect BD to core
10 SR_Z -- pad is high impedance
12 type SRSAMPLEMODE_TYPE is (
13 SR_Normal, -- No sampling or shifting
14 SR_Sample, -- Sample IO state in BD SR on rising edge of TCK
15 SR_Update, -- Update BD from SR on falling edge of TCK
16 SR_Shift -- Shift the BD SR
19 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector;
20 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector;
21 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector;
22 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector;
24 component c4m_jtag_tap_fsm is
35 CAPTURE: out std_logic;
39 end component c4m_jtag_tap_fsm;
41 component c4m_jtag_irblock is
43 IR_WIDTH: integer := 2
50 TDO_EN: out std_logic;
52 -- instruction register
53 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
57 CAPTURE: in std_logic;
61 end component c4m_jtag_irblock;
63 component c4m_jtag_idblock is
65 IR_WIDTH: integer := 2;
67 -- The default MANUFACTURING ID is not representing a valid
68 -- manufacturer according to the JTAG standard
69 MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111";
70 PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001";
71 VERSION: std_logic_vector(3 downto 0) := "0000"
78 TDO_EN: out std_logic;
81 IR: in std_logic_vector(IR_WIDTH-1 downto 0);
84 CAPTURE: in std_logic;
88 end component c4m_jtag_idblock;
90 component c4m_jtag_iocell is
93 CORE_IN: out std_logic;
94 CORE_OUT: in std_logic;
95 CORE_EN: in std_logic;
99 PAD_OUT: out std_logic;
100 PAD_EN: out std_logic;
103 BDSR_IN: in std_logic;
104 BDSR_OUT: out std_logic;
107 IOMODE: in SRIOMODE_TYPE;
108 SAMPLEMODE: in SRSAMPLEMODE_TYPE;
111 end component c4m_jtag_iocell;
113 component c4m_jtag_ioblock is
115 IR_WIDTH: integer := 2;
119 -- needed TAP signals
123 TDO_EN: out std_logic;
126 IR: in std_logic_vector(IR_WIDTH-1 downto 0);
128 -- What action to perform
129 CAPTURE: in std_logic;
131 UPDATE: in std_logic;
133 -- The I/O access ports
134 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
135 CORE_IN: out std_logic_vector(IOS-1 downto 0);
136 CORE_EN: in std_logic_vector(IOS-1 downto 0);
138 -- The pad connections
139 PAD_OUT: out std_logic_vector(IOS-1 downto 0);
140 PAD_IN: in std_logic_vector(IOS-1 downto 0);
141 PAD_EN: out std_logic_vector(IOS-1 downto 0)
143 end component c4m_jtag_ioblock;
145 component c4m_jtag_tap_controller is
147 DEBUG: boolean := false;
149 IR_WIDTH: integer := 2;
152 -- The default MANUFACTURING ID is not representing a valid
153 -- manufacturer according to the JTAG standard
154 MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111";
155 PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001";
156 VERSION: std_logic_vector(3 downto 0) := "0000"
164 TRST_N: in std_logic;
166 -- The Instruction Register
167 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
169 -- The FSM state indicators
170 RESET: out std_logic; -- In reset state
171 CAPTURE: out std_logic; -- In DR_Capture state
172 SHIFT: out std_logic; -- In DR_Shift state
173 UPDATE: out std_logic; -- In DR_Update state
174 -- The I/O access ports
175 CORE_IN: out std_logic_vector(IOS-1 downto 0);
176 CORE_EN: in std_logic_vector(IOS-1 downto 0);
177 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
179 -- The pad connections
180 PAD_IN: in std_logic_vector(IOS-1 downto 0);
181 PAD_EN: out std_logic_vector(IOS-1 downto 0);
182 PAD_OUT: out std_logic_vector(IOS-1 downto 0)
184 end component c4m_jtag_tap_controller;
187 package body c4m_jtag is
188 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector is
189 variable return_vector: std_logic_vector(width-1 downto 0);
191 return_vector := (others => '1');
192 return return_vector;
195 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector is
196 variable return_vector: std_logic_vector(width-1 downto 0);
198 return_vector := (0 => '1', others => '0');
199 return return_vector;
202 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector is
203 variable return_vector: std_logic_vector(width-1 downto 0);
205 return_vector := (1 => '1', others => '0');
206 return return_vector;
209 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector is
210 variable return_vector: std_logic_vector(width-1 downto 0);
212 return_vector := (others => '0');
213 return return_vector;