Support for different IO types in VHDL code.
[c4m-jtag.git] / c4m / vhdl / jtag / c4m_jtag_pkg.vhdl
1 -- Package of jtag support code from the Chips4Makers project
2 library ieee;
3 use ieee.std_logic_1164.ALL;
4
5 package c4m_jtag is
6 type SRIOMODE_TYPE is (
7 SR_Through, -- Connect core signal to pad signals
8 SR_2Pad, -- Connect BD to pad
9 SR_2Core, -- Connect BD to core
10 SR_2PadCore, -- Connect BD to pad and core
11 SR_Z -- pad is high impedance
12 );
13 type SRSAMPLEMODE_TYPE is (
14 SR_Normal, -- No sampling or shifting
15 SR_Sample, -- Sample IO state in BD SR on rising edge of TCK
16 SR_Update, -- Update BD from SR on falling edge of TCK
17 SR_Shift -- Shift the BD SR
18 );
19 type IOTYPE_TYPE is (
20 IO_IN, -- Input only
21 IO_OUT, -- Output only, without tristate
22 IO_OUT3, -- Output only, with tristate
23 IO_INOUT3 -- Input and output with tristate
24 );
25 type IOTYPE_VECTOR is array ( natural range <> ) of IOTYPE_TYPE;
26
27 constant IOTYPES_NULL: IOTYPE_VECTOR(1 to 0) := (others => IO_INOUT3);
28
29 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector;
30 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector;
31 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector;
32 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector;
33 function gen_iotypes(count: integer; iotype: IOTYPE_TYPE := IO_INOUT3) return IOTYPE_VECTOR;
34
35 component c4m_jtag_tap_fsm is
36 port (
37 -- The TAP signals
38 TCK: in std_logic;
39 TMS: in std_logic;
40 TRST_N: in std_logic;
41
42 -- The state outputs
43 RESET: out std_logic;
44 ISDR: out std_logic;
45 ISIR: out std_logic;
46 CAPTURE: out std_logic;
47 SHIFT: out std_logic;
48 UPDATE: out std_logic
49 );
50 end component c4m_jtag_tap_fsm;
51
52 component c4m_jtag_irblock is
53 generic (
54 IR_WIDTH: integer := 2
55 );
56 port (
57 -- needed TAP signals
58 TCK: in std_logic;
59 TDI: in std_logic;
60 TDO: out std_logic;
61 TDO_EN: out std_logic;
62
63 -- instruction register
64 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
65
66 -- actions
67 RESET: in std_logic;
68 CAPTURE: in std_logic;
69 SHIFT: in std_logic;
70 UPDATE: in std_logic
71 );
72 end component c4m_jtag_irblock;
73
74 component c4m_jtag_idblock is
75 generic (
76 IR_WIDTH: integer := 2;
77
78 -- The default MANUFACTURING ID is not representing a valid
79 -- manufacturer according to the JTAG standard
80 MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111";
81 PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001";
82 VERSION: std_logic_vector(3 downto 0) := "0000"
83 );
84 port (
85 -- needed TAP signals
86 TCK: in std_logic;
87 TDI: in std_logic;
88 TDO: out std_logic;
89 TDO_EN: out std_logic;
90
91 -- The instruction
92 IR: in std_logic_vector(IR_WIDTH-1 downto 0);
93
94 -- actions
95 CAPTURE: in std_logic;
96 SHIFT: in std_logic;
97 UPDATE: in std_logic
98 );
99 end component c4m_jtag_idblock;
100
101 component c4m_jtag_iocell is
102 generic (
103 IOTYPE: IOTYPE_TYPE
104 );
105 port (
106 -- core connections
107 CORE_IN: out std_logic;
108 CORE_OUT: in std_logic;
109 CORE_EN: in std_logic;
110
111 -- pad connections
112 PAD_IN: in std_logic;
113 PAD_OUT: out std_logic;
114 PAD_EN: out std_logic;
115
116 -- BD shift register
117 BDSR_IN: in std_logic;
118 BDSR_OUT: out std_logic;
119
120 -- Mode of I/O cell
121 IOMODE: in SRIOMODE_TYPE;
122 SAMPLEMODE: in SRSAMPLEMODE_TYPE;
123 TCK: in std_logic
124 );
125 end component c4m_jtag_iocell;
126
127 component c4m_jtag_ioblock is
128 generic (
129 IR_WIDTH: integer := 2;
130 IOTYPES: IOTYPE_VECTOR
131 );
132 port (
133 -- needed TAP signals
134 TCK: in std_logic;
135 TDI: in std_logic;
136 TDO: out std_logic;
137 TDO_EN: out std_logic;
138
139 -- The instruction
140 IR: in std_logic_vector(IR_WIDTH-1 downto 0);
141
142 -- actions
143 CAPTURE: in std_logic;
144 SHIFT: in std_logic;
145 UPDATE: in std_logic;
146
147 -- The I/O access ports
148 CORE_OUT: in std_logic_vector(IOTYPES'range);
149 CORE_IN: out std_logic_vector(IOTYPES'range);
150 CORE_EN: in std_logic_vector(IOTYPES'range);
151
152 -- The pad connections
153 PAD_OUT: out std_logic_vector(IOTYPES'range);
154 PAD_IN: in std_logic_vector(IOTYPES'range);
155 PAD_EN: out std_logic_vector(IOTYPES'range)
156 );
157 end component c4m_jtag_ioblock;
158
159 component c4m_jtag_tap_controller is
160 generic (
161 DEBUG: boolean := false;
162
163 IR_WIDTH: integer := 2;
164 IOTYPES: IOTYPE_VECTOR := IOTYPES_NULL;
165
166 -- The default MANUFACTURING ID is not representing a valid
167 -- manufacturer according to the JTAG standard
168 MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111";
169 PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001";
170 VERSION: std_logic_vector(3 downto 0) := "0000"
171 );
172 port (
173 -- The TAP signals
174 TCK: in std_logic;
175 TMS: in std_logic;
176 TDI: in std_logic;
177 TDO: out std_logic;
178 TRST_N: in std_logic;
179
180 -- The Instruction Register
181 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
182
183 -- The FSM state indicators
184 RESET: out std_logic; -- In reset state
185 CAPTURE: out std_logic; -- In DR_Capture state
186 SHIFT: out std_logic; -- In DR_Shift state
187 UPDATE: out std_logic; -- In DR_Update state
188
189 -- The I/O access ports
190 CORE_IN: out std_logic_vector(IOTYPES'range);
191 CORE_EN: in std_logic_vector(IOTYPES'range);
192 CORE_OUT: in std_logic_vector(IOTYPES'range);
193
194 -- The pad connections
195 PAD_IN: in std_logic_vector(IOTYPES'range);
196 PAD_EN: out std_logic_vector(IOTYPES'range);
197 PAD_OUT: out std_logic_vector(IOTYPES'range)
198 );
199 end component c4m_jtag_tap_controller;
200 end c4m_jtag;
201
202 package body c4m_jtag is
203 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector is
204 variable return_vector: std_logic_vector(width-1 downto 0);
205 begin
206 return_vector := (others => '1');
207 return return_vector;
208 end;
209
210 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector is
211 variable return_vector: std_logic_vector(width-1 downto 0);
212 begin
213 return_vector := (0 => '1', others => '0');
214 return return_vector;
215 end;
216
217 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector is
218 variable return_vector: std_logic_vector(width-1 downto 0);
219 begin
220 return_vector := (1 => '1', others => '0');
221 return return_vector;
222 end;
223
224 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector is
225 variable return_vector: std_logic_vector(width-1 downto 0);
226 begin
227 return_vector := (others => '0');
228 return return_vector;
229 end;
230
231 function gen_iotypes(count: integer; iotype: IOTYPE_TYPE := IO_INOUT3) return IOTYPE_VECTOR is
232 variable return_vector: IOTYPE_VECTOR(0 to count-1);
233 begin
234 return_vector := (others => iotype);
235 return return_vector;
236 end function gen_iotypes;
237 end package body;