1 -- Package of jtag support code from the Chips4Makers project
3 use ieee.std_logic_1164.ALL;
6 type TAPSTATE_TYPE is (
18 type SRIOMODE_TYPE is (
19 SR_Through, -- Connect core signal to pad signals
20 SR_2Pad, -- Connect BD to pad
21 SR_2Core, -- Connect BD to core
22 SR_Z -- pad is high impedance
24 type SRSAMPLEMODE_TYPE is (
25 SR_Normal, -- No sampling or shifting
26 SR_Sample, -- Sample IO state in BD SR on rising edge of TCK
27 SR_Update, -- Update BD from SR on falling edge of TCK
28 SR_Shift -- Shift the BD SR
31 component c4m_jtag_tap_fsm is
39 STATE: out TAPSTATE_TYPE;
40 NEXT_STATE: out TAPSTATE_TYPE;
41 DRSTATE: out std_logic;
42 IRSTATE: out std_logic
44 end component c4m_jtag_tap_fsm;
46 component c4m_jtag_irblock is
48 IR_WIDTH: integer := 2
55 TDO_EN: out std_logic;
58 STATE: in TAPSTATE_TYPE;
59 NEXT_STATE: in TAPSTATE_TYPE;
60 IRSTATE: in std_logic;
62 -- instruction register
63 IR: out std_logic_vector(IR_WIDTH-1 downto 0)
65 end component c4m_jtag_irblock;
67 component c4m_jtag_idblock is
69 IR_WIDTH: integer := 2;
71 PART_NUMBER: std_logic_vector(15 downto 0);
72 VERSION: std_logic_vector(3 downto 0) := "0000";
73 MANUFACTURER: std_logic_vector(10 downto 0)
80 TDO_EN: out std_logic;
83 STATE: in TAPSTATE_TYPE;
84 NEXT_STATE: in TAPSTATE_TYPE;
85 DRSTATE: in std_logic;
88 IR: in std_logic_vector(IR_WIDTH-1 downto 0)
90 end component c4m_jtag_idblock;
92 component c4m_jtag_iocell is
95 CORE_IN: out std_logic;
96 CORE_OUT: in std_logic;
97 CORE_EN: in std_logic;
100 PAD_IN: in std_logic;
101 PAD_OUT: out std_logic;
102 PAD_EN: out std_logic;
105 BDSR_IN: in std_logic;
106 BDSR_OUT: out std_logic;
109 IOMODE: in SRIOMODE_TYPE;
110 SAMPLEMODE: in SRSAMPLEMODE_TYPE;
113 end component c4m_jtag_iocell;
115 component c4m_jtag_ioblock is
117 IR_WIDTH: integer := 2;
121 -- needed TAP signals
125 TDO_EN: out std_logic;
128 STATE: in TAPSTATE_TYPE;
129 NEXT_STATE: in TAPSTATE_TYPE;
130 DRSTATE: in std_logic;
133 IR: in std_logic_vector(IR_WIDTH-1 downto 0);
135 -- The I/O access ports
136 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
137 CORE_IN: out std_logic_vector(IOS-1 downto 0);
138 CORE_EN: in std_logic_vector(IOS-1 downto 0);
140 -- The pad connections
141 PAD_OUT: out std_logic_vector(IOS-1 downto 0);
142 PAD_IN: in std_logic_vector(IOS-1 downto 0);
143 PAD_EN: out std_logic_vector(IOS-1 downto 0)
145 end component c4m_jtag_ioblock;
147 component c4m_jtag_tap_controller is
149 IR_WIDTH: integer := 2;
152 VERSION: std_logic_vector(3 downto 0) := "0000"
160 TDO_EN: out std_logic;
161 TRST_N: in std_logic;
163 -- The FSM state indicators
164 STATE: out TAPSTATE_TYPE;
165 NEXT_STATE: out TAPSTATE_TYPE;
166 DRSTATE: out std_logic;
168 -- The Instruction Register
169 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
171 -- The I/O access ports
172 CORE_IN: out std_logic_vector(IOS-1 downto 0);
173 CORE_EN: in std_logic_vector(IOS-1 downto 0);
174 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
176 -- The pad connections
177 PAD_IN: in std_logic_vector(IOS-1 downto 0);
178 PAD_EN: out std_logic_vector(IOS-1 downto 0);
179 PAD_OUT: out std_logic_vector(IOS-1 downto 0)
181 end component c4m_jtag_tap_controller;
183 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector;
184 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector;
185 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector;
186 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector;
189 package body c4m_jtag is
190 function c4m_jtag_cmd_bypass(width: integer) return std_logic_vector is
191 variable return_vector: std_logic_vector(width-1 downto 0);
193 return_vector := (others => '1');
194 return return_vector;
197 function c4m_jtag_cmd_idcode(width: integer) return std_logic_vector is
198 variable return_vector: std_logic_vector(width-1 downto 0);
200 return_vector := (0 => '1', others => '0');
201 return return_vector;
204 function c4m_jtag_cmd_samplepreload(width: integer) return std_logic_vector is
205 variable return_vector: std_logic_vector(width-1 downto 0);
207 return_vector := (1 => '1', others => '0');
208 return return_vector;
211 function c4m_jtag_cmd_extest(width: integer) return std_logic_vector is
212 variable return_vector: std_logic_vector(width-1 downto 0);
214 return_vector := (others => '0');
215 return return_vector;