rtl/vhdl/c4m_jtag_tap_controller.vhdl

   1 -- A JTAG complient tap controller implementation
   2 -- This is implemented based on the IEEE 1149.1 standard
   3
   4 library ieee;
   5 use ieee.std_logic_1164.ALL;
   6
   7 use work.c4m_jtag.ALL;
   8
   9 entity c4m_jtag_tap_controller is
  10   generic (
  11     IR_WIDTH:           integer := 2;
  12     IOS:                integer := 1;
  13
  14     MANUFACTURER:       std_logic_vector(10 downto 0) := "10001111111";
  15     PART_NUMBER:        std_logic_vector(15 downto 0) := "0000000000000001";
  16     VERSION:            std_logic_vector(3 downto 0) := "0000"
  17   );
  18   port (
  19     -- The TAP signals
  20     TCK:        in std_logic;
  21     TMS:        in std_logic;
  22     TDI:        in std_logic;
  23     TDO:        out std_logic;
  24     TRST_N:     in std_logic;
  25
  26     -- The FSM state indicators
  27     RESET:      out std_logic;
  28     DRCAPTURE:  out std_logic;
  29     DRSHIFT:    out std_logic;
  30     DRUPDATE:   out std_logic;
  31
  32     -- The Instruction Register
  33     IR:         out std_logic_vector(IR_WIDTH-1 downto 0);
  34
  35     -- The I/O access ports
  36     CORE_IN:    out std_logic_vector(IOS-1 downto 0);
  37     CORE_EN:    in std_logic_vector(IOS-1 downto 0);
  38     CORE_OUT:   in std_logic_vector(IOS-1 downto 0);
  39
  40     -- The pad connections
  41     PAD_IN:     in std_logic_vector(IOS-1 downto 0);
  42     PAD_EN:     out std_logic_vector(IOS-1 downto 0);
  43     PAD_OUT:    out std_logic_vector(IOS-1 downto 0)
  44   );
  45 end c4m_jtag_tap_controller;
  46
  47 architecture rtl of c4m_jtag_tap_controller is
  48   signal S_STATE:       TAPSTATE_TYPE;
  49   signal S_NEXT_STATE:  TAPSTATE_TYPE;
  50   signal S_IRSTATE:     std_logic;
  51   signal S_DRSTATE:     std_logic;
  52   signal S_IR:          std_logic_vector(IR_WIDTH-1 downto 0);
  53
  54   signal IR_TDO:        std_logic;
  55   signal IR_TDO_EN:     std_logic;
  56   signal ID_TDO:        std_logic;
  57   signal ID_TDO_EN:     std_logic;
  58   signal IO_TDO:        std_logic;
  59   signal IO_TDO_EN:     std_logic;
  60   signal EN:            std_logic_vector(2 downto 0) := "000";
  61 begin
  62   IR <= S_IR;
  63
  64   RESET     <= '1' when S_STATE = TestLogicReset              else '0';
  65   DRCAPTURE <= '1' when S_STATE = Capture and S_DRSTATE = '1' else '0';
  66   DRSHIFT   <= '1' when S_STATE = Shift   and S_DRSTATE = '1' else '0';
  67   DRUPDATE  <= '1' when S_STATE = Update  and S_DRSTATE = '1' else '0';
  68
  69   -- JTAG state machine
  70   FSM:  c4m_jtag_tap_fsm
  71     port map (
  72       TCK => TCK,
  73       TMS => TMS,
  74       TRST_N => TRST_N,
  75       STATE => S_STATE,
  76       NEXT_STATE => S_NEXT_STATE,
  77       DRSTATE => S_DRSTATE,
  78       IRSTATE => S_IRSTATE
  79     );
  80
  81   -- The instruction register
  82   IRBLOCK: c4m_jtag_irblock
  83     generic map (
  84       IR_WIDTH => IR_WIDTH
  85     )
  86     port map (
  87       TCK => TCK,
  88       TDI => TDI,
  89       TDO => IR_TDO,
  90       TDO_EN => IR_TDO_EN,
  91       STATE => S_STATE,
  92       NEXT_STATE => S_NEXT_STATE,
  93       IRSTATE => S_IRSTATE,
  94       IR => S_IR
  95     );
  96
  97   -- The ID
  98   IDBLOCK: c4m_jtag_idblock
  99     generic map (
 100       IR_WIDTH => IR_WIDTH,
 101       PART_NUMBER => PART_NUMBER,
 102       MANUFACTURER => MANUFACTURER
 103     )
 104     port map (
 105       TCK => TCK,
 106       TDI => TDI,
 107       TDO => ID_TDO,
 108       TDO_EN => ID_TDO_EN,
 109       STATE => S_STATE,
 110       NEXT_STATE => S_NEXT_STATE,
 111       DRSTATE => S_DRSTATE,
 112       IR => S_IR
 113     );
 114
 115   -- The IOS
 116   IOBLOCK: c4m_jtag_ioblock
 117     generic map (
 118       IR_WIDTH => IR_WIDTH,
 119       IOS => IOS
 120     )
 121     port map (
 122       TCK => TCK,
 123       TDI => TDI,
 124       TDO => IO_TDO,
 125       TDO_EN => IO_TDO_EN,
 126       STATE => S_STATE,
 127       NEXT_STATE => S_NEXT_STATE,
 128       DRSTATE => S_DRSTATE,
 129       IR => S_IR,
 130       CORE_OUT => CORE_OUT,
 131       CORE_IN => CORE_IN,
 132       CORE_EN => CORE_EN,
 133       PAD_OUT => PAD_OUT,
 134       PAD_IN => PAD_IN,
 135       PAD_EN => PAD_EN
 136     );
 137
 138   TDO <= IR_TDO when IR_TDO_EN = '1' else
 139          ID_TDO when ID_TDO_EN = '1' else
 140          IO_TDO when IO_TDO_EN = '1' else
 141          '0';
 142
 143   EN <= IR_TDO_EN & ID_TDO_EN & IO_TDO_EN;
 144   assert EN = "000" or EN = "100" or EN = "010" or EN = "001"
 145     report "TDO conflict in c4m_jtag_tap_controller"
 146     severity ERROR;
 147 end rtl;
 148
 149