Don't use tri-state logic for TDO; introduce TDO_EN signal to indicate when TDO is...
[c4m-jtag.git] / rtl / vhdl / c4m_jtag_tap_controller.vhdl
1 -- A JTAG complient tap controller implementation
2 -- This is implemented based on the IEEE 1149.1 standard
3
4 library ieee;
5 use ieee.std_logic_1164.ALL;
6
7 use work.c4m_jtag.ALL;
8
9 entity c4m_jtag_tap_controller is
10 generic (
11 IR_WIDTH: integer := 2;
12 IOS: integer := 1;
13
14 VERSION: std_logic_vector(3 downto 0)
15 );
16 port (
17 -- The TAP signals
18 TCK: in std_logic;
19 TMS: in std_logic;
20 TDI: in std_logic;
21 TDO: out std_logic;
22 TDO_EN: out std_logic;
23 TRST_N: in std_logic;
24
25 -- The FSM state indicators
26 STATE: out TAPSTATE_TYPE;
27 NEXT_STATE: out TAPSTATE_TYPE;
28 DRSTATE: out std_logic;
29
30 -- The Instruction Register
31 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
32
33 -- The I/O access ports
34 CORE_IN: out std_logic_vector(IOS-1 downto 0);
35 CORE_EN: in std_logic_vector(IOS-1 downto 0);
36 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
37
38 -- The pad connections
39 PAD_IN: in std_logic_vector(IOS-1 downto 0);
40 PAD_EN: out std_logic_vector(IOS-1 downto 0);
41 PAD_OUT: out std_logic_vector(IOS-1 downto 0)
42 );
43 end c4m_jtag_tap_controller;
44
45 architecture rtl of c4m_jtag_tap_controller is
46 signal S_STATE: TAPSTATE_TYPE;
47 signal S_NEXT_STATE: TAPSTATE_TYPE;
48 signal S_IRSTATE: std_logic;
49 signal S_DRSTATE: std_logic;
50 signal S_IR: std_logic_vector(IR_WIDTH-1 downto 0);
51
52 signal IR_TDO: std_logic;
53 signal IR_TDO_EN: std_logic;
54 signal ID_TDO: std_logic;
55 signal ID_TDO_EN: std_logic;
56 signal IO_TDO: std_logic;
57 signal IO_TDO_EN: std_logic;
58 signal EN: std_logic_vector(2 downto 0) := "000";
59
60 -- TODO: Automate PART_NUMBER generation
61 constant PART_NUMBER: std_logic_vector(15 downto 0) := "0000000010001001";
62 -- TODO: Get manufacturer ID
63 constant MANUFACTURER: std_logic_vector(10 downto 0) := "00000000000";
64 begin
65 STATE <= S_STATE;
66 NEXT_STATE <= S_NEXT_STATE;
67 DRSTATE <= S_DRSTATE;
68 IR <= S_IR;
69
70 -- JTAG state machine
71 FSM: c4m_jtag_tap_fsm
72 port map (
73 TCK => TCK,
74 TMS => TMS,
75 TRST_N => TRST_N,
76 STATE => S_STATE,
77 NEXT_STATE => S_NEXT_STATE,
78 DRSTATE => S_DRSTATE,
79 IRSTATE => S_IRSTATE
80 );
81
82 -- The instruction register
83 IRBLOCK: c4m_jtag_irblock
84 generic map (
85 IR_WIDTH => IR_WIDTH
86 )
87 port map (
88 TCK => TCK,
89 TDI => TDI,
90 TDO => IR_TDO,
91 TDO_EN => IR_TDO_EN,
92 STATE => S_STATE,
93 NEXT_STATE => S_NEXT_STATE,
94 IRSTATE => S_IRSTATE,
95 IR => S_IR
96 );
97
98 -- The ID
99 IDBLOCK: c4m_jtag_idblock
100 generic map (
101 IR_WIDTH => IR_WIDTH,
102 PART_NUMBER => PART_NUMBER,
103 MANUFACTURER => MANUFACTURER
104 )
105 port map (
106 TCK => TCK,
107 TDI => TDI,
108 TDO => ID_TDO,
109 TDO_EN => ID_TDO_EN,
110 STATE => S_STATE,
111 NEXT_STATE => S_NEXT_STATE,
112 DRSTATE => S_DRSTATE,
113 IR => S_IR
114 );
115
116 -- The IOS
117 IOBLOCK: c4m_jtag_ioblock
118 generic map (
119 IR_WIDTH => IR_WIDTH,
120 IOS => IOS
121 )
122 port map (
123 TCK => TCK,
124 TDI => TDI,
125 TDO => IO_TDO,
126 TDO_EN => IO_TDO_EN,
127 STATE => S_STATE,
128 NEXT_STATE => S_NEXT_STATE,
129 DRSTATE => S_DRSTATE,
130 IR => S_IR,
131 CORE_OUT => CORE_OUT,
132 CORE_IN => CORE_IN,
133 CORE_EN => CORE_EN,
134 PAD_OUT => PAD_OUT,
135 PAD_IN => PAD_IN,
136 PAD_EN => PAD_EN
137 );
138
139 TDO <= IR_TDO when IR_TDO_EN = '1' else
140 ID_TDO when ID_TDO_EN = '1' else
141 IO_TDO when IO_TDO_EN = '1' else
142 '0';
143 TDO_EN <= IR_TDO_EN or ID_TDO_EN or IO_TDO_EN;
144
145 EN <= IR_TDO_EN & ID_TDO_EN & IO_TDO_EN;
146 assert EN = "000" or EN = "100" or EN = "010" or EN = "001"
147 report "TDO conflict in c4m_jtag_tap_controller"
148 severity ERROR;
149 end rtl;
150
151