1 -- The JTAG state machine
2 -- This is implemented based on the IEEE 1149.1 standard
5 use ieee.std_logic_1164.ALL;
9 entity c4m_jtag_tap_fsm is
17 STATE: out TAPSTATE_TYPE;
18 NEXT_STATE: out TAPSTATE_TYPE;
19 DRSTATE: out std_logic;
20 IRSTATE: out std_logic
24 architecture rtl of c4m_jtag_tap_fsm is
25 signal S_STATE: TAPSTATE_TYPE;
26 signal S_NEXT_STATE: TAPSTATE_TYPE;
27 signal S_DRSTATE: std_logic;
28 signal S_IRSTATE: std_logic;
29 signal NEXT_DRSTATE: std_logic;
30 signal NEXT_IRSTATE: std_logic;
33 NEXT_STATE <= S_NEXT_STATE;
42 S_STATE <= TestLogicReset;
43 elsif rising_edge(TCK) then
44 S_STATE <= S_NEXT_STATE;
45 S_DRSTATE <= NEXT_DRSTATE;
46 S_IRSTATE <= NEXT_IRSTATE;
51 '0' when S_NEXT_STATE = TestLogicReset else
52 '0' when S_NEXT_STATE = RunTestIdle else
53 '1' when S_NEXT_STATE = SelectDRScan else
54 '0' when S_NEXT_STATE = SelectIRScan else
57 '0' when S_NEXT_STATE = TestLogicReset else
58 '0' when S_NEXT_STATE = RunTestIdle else
59 '0' when S_NEXT_STATE = SelectDRScan else
60 '1' when S_NEXT_STATE = SelectIRScan else
63 process (S_STATE, TMS)
66 when TestLogicReset =>
68 S_NEXT_STATE <= RunTestIdle;
70 S_NEXT_STATE <= TestLogicReset;
75 S_NEXT_STATE <= RunTestIdle;
77 S_NEXT_STATE <= SelectDRScan;
82 S_NEXT_STATE <= Capture;
84 S_NEXT_STATE <= SelectIRScan;
89 S_NEXT_STATE <= Capture;
91 S_NEXT_STATE <= TestLogicReset;
96 S_NEXT_STATE <= Shift;
98 S_NEXT_STATE <= Exit1;
103 S_NEXT_STATE <= Shift;
105 S_NEXT_STATE <= Exit1;
110 S_NEXT_STATE <= Pause;
112 S_NEXT_STATE <= Update;
117 S_NEXT_STATE <= Pause;
119 S_NEXT_STATE <= Exit2;
124 S_NEXT_STATE <= Shift;
126 S_NEXT_STATE <= Update;
131 S_NEXT_STATE <= RunTestIdle;
133 S_NEXT_STATE <= SelectDRScan;
137 S_NEXT_STATE <= TestLogicReset;