sim/cocotb/controller/Makefile

   1 PWD=$(realpath .)
   2 TOPDIR=$(realpath ../../..)
   3 VHDLDIR=$(TOPDIR)/rtl/vhdl
   4 VHDL_SOURCES = \
   5   $(VHDLDIR)/c4m_jtag_pkg.vhdl \
   6   $(VHDLDIR)/c4m_jtag_tap_fsm.vhdl \
   7   $(VHDLDIR)/c4m_jtag_irblock.vhdl \
   8   $(VHDLDIR)/c4m_jtag_iocell.vhdl \
   9   $(VHDLDIR)/c4m_jtag_ioblock.vhdl \
  10   $(VHDLDIR)/c4m_jtag_idblock.vhdl \
  11   $(VHDLDIR)/c4m_jtag_tap_controller.vhdl
  12 TOPLEVEL=c4m_jtag_tap_controller
  13 TOPLEVEL_LANG=vhdl
  14 MODULE=test
  15 SIM=ghdl
  16 GPI_IMPL=vhpi
  17 SIM_ARGS=--wave=test.ghw
  18
  19 COCOTBDIR=$(shell cocotb-path)
  20
  21 include $(COCOTBDIR)/makefiles/Makefile.inc
  22 include $(COCOTBDIR)/makefiles/Makefile.sim