sim/cocotb/dual_parallel/Makefile

   1 COCOTB=$(HOME)/eda/code/cocotb
   2 VHDLDIR=$(HOME)/eda/code/c4m_jtag/rtl/vhdl
   3 VHDL_SOURCES = \
   4   $(VHDLDIR)/c4m_jtag_pkg.vhdl \
   5   $(VHDLDIR)/c4m_jtag_tap_fsm.vhdl \
   6   $(VHDLDIR)/c4m_jtag_irblock.vhdl \
   7   $(VHDLDIR)/c4m_jtag_iocell.vhdl \
   8   $(VHDLDIR)/c4m_jtag_ioblock.vhdl \
   9   $(VHDLDIR)/c4m_jtag_idblock.vhdl \
  10   $(VHDLDIR)/c4m_jtag_tap_controller.vhdl \
  11   $(PWD)/dual_parallel.vhdl
  12 TOPLEVEL=dual_parallel
  13 TOPLEVEL_LANG=vhdl
  14 MODULE=test
  15 SIM=ghdl
  16 GPI_IMPL=vhpi
  17 SIM_ARGS=--wave=test.ghw
  18
  19 include $(COCOTB)/makefiles/Makefile.inc
  20 include $(COCOTB)/makefiles/Makefile.sim