Support for different IO types in VHDL code.

[c4m-jtag.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index d703adb438927f82dd7e4ee9ae2509103b25c745..0cc5bdd54203665ce429aaeb0b899ac9a62d693f 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -5,3 +5,6 @@
 results.xml
 *.ghw
 sim/ghdl/bench_idcode
+build
+sim_build
+*.egg-info
\ No newline at end of file