Setup new structure for code
[c4m-jtag.git] / rtl / vhdl / c4m_jtag_pkg.vhdl
index 5ac343f52824ab2dd7bd4622201cd0f278ce21a2..0fc07490762d753276457d4e660450671f5ef681 100644 (file)
@@ -148,6 +148,8 @@ package c4m_jtag is
 
   component c4m_jtag_tap_controller is
     generic (
+      DEBUG:            boolean := false;
+
       IR_WIDTH:         integer := 2;
       IOS:              integer := 1;
 
@@ -163,13 +165,13 @@ package c4m_jtag is
       TMS:      in std_logic;
       TDI:      in std_logic;
       TDO:      out std_logic;
-      TDO_EN:   out std_logic;
       TRST_N:   in std_logic;
 
       -- The FSM state indicators
-      STATE:    out TAPSTATE_TYPE;
-      NEXT_STATE: out TAPSTATE_TYPE;
-      DRSTATE:  out std_logic;
+      RESET:    out std_logic; -- In reset state
+      DRCAPTURE: out std_logic; -- In DR_Capture state
+      DRSHIFT:  out std_logic; -- In DR_Shift state
+      DRUPDATE: out std_logic; -- In DR_Update state
 
       -- The Instruction Register
       IR:       out std_logic_vector(IR_WIDTH-1 downto 0);