CURDIR=$(realpath .)
-TOPDIR=$(realpath ../../..)
+TOPDIR=$(realpath ../../../..)
ifeq ($(PYTHONPATH),)
PYTHONPATH := $(TOPDIR)
$(VHDLDIR)/c4m_jtag_iocell.vhdl \
$(VHDLDIR)/c4m_jtag_ioblock.vhdl \
$(VHDLDIR)/c4m_jtag_idblock.vhdl \
- $(VHDLDIR)/c4m_jtag_tap_controller.vhdl
-TOPLEVEL=c4m_jtag_tap_controller
+ $(VHDLDIR)/c4m_jtag_tap_controller.vhdl \
+ $(CURDIR)/controller.vhdl
+#VHDL_SOURCES end
+TOPLEVEL=controller
TOPLEVEL_LANG=vhdl
MODULE=test
SIM=ghdl