X-Git-Url: https://git.libre-soc.org/?p=c4m-jtag.git;a=blobdiff_plain;f=rtl%2Fvhdl%2Fc4m_jtag_tap_controller.vhdl;h=217982e80ec237e074eb2bf90c08fa9d48f9e47f;hp=5c2d6dcb0a480567905ef9c80622bbb9e4fb773e;hb=abf90f14e0f5247c90f9513d0051b90f3def1b87;hpb=84f13c8e9898b63b686c4c5e982f6ef5e554a7c6;ds=sidebyside diff --git a/rtl/vhdl/c4m_jtag_tap_controller.vhdl b/rtl/vhdl/c4m_jtag_tap_controller.vhdl index 5c2d6dc..217982e 100644 --- a/rtl/vhdl/c4m_jtag_tap_controller.vhdl +++ b/rtl/vhdl/c4m_jtag_tap_controller.vhdl @@ -8,10 +8,14 @@ use work.c4m_jtag.ALL; entity c4m_jtag_tap_controller is generic ( - IR_WIDTH: integer := 2; - IOS: integer := 1; + DEBUG: boolean := false; - VERSION: std_logic_vector(3 downto 0) + IR_WIDTH: integer := 2; + IOS: integer := 1; + + MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111"; + PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001"; + VERSION: std_logic_vector(3 downto 0) := "0000" ); port ( -- The TAP signals @@ -19,13 +23,13 @@ entity c4m_jtag_tap_controller is TMS: in std_logic; TDI: in std_logic; TDO: out std_logic; - TDO_EN: out std_logic; TRST_N: in std_logic; -- The FSM state indicators - STATE: out TAPSTATE_TYPE; - NEXT_STATE: out TAPSTATE_TYPE; - DRSTATE: out std_logic; + RESET: out std_logic; + DRCAPTURE: out std_logic; + DRSHIFT: out std_logic; + DRUPDATE: out std_logic; -- The Instruction Register IR: out std_logic_vector(IR_WIDTH-1 downto 0); @@ -55,18 +59,14 @@ architecture rtl of c4m_jtag_tap_controller is signal ID_TDO_EN: std_logic; signal IO_TDO: std_logic; signal IO_TDO_EN: std_logic; - signal EN: std_logic_vector(2 downto 0) := "000"; - - -- TODO: Automate PART_NUMBER generation - constant PART_NUMBER: std_logic_vector(15 downto 0) := "0000000010001001"; - -- TODO: Get manufacturer ID - constant MANUFACTURER: std_logic_vector(10 downto 0) := "00000000000"; begin - STATE <= S_STATE; - NEXT_STATE <= S_NEXT_STATE; - DRSTATE <= S_DRSTATE; IR <= S_IR; + RESET <= '1' when S_STATE = TestLogicReset else '0'; + DRCAPTURE <= '1' when S_STATE = Capture and S_DRSTATE = '1' else '0'; + DRSHIFT <= '1' when S_STATE = Shift and S_DRSTATE = '1' else '0'; + DRUPDATE <= '1' when S_STATE = Update and S_DRSTATE = '1' else '0'; + -- JTAG state machine FSM: c4m_jtag_tap_fsm port map ( @@ -140,12 +140,15 @@ begin ID_TDO when ID_TDO_EN = '1' else IO_TDO when IO_TDO_EN = '1' else '0'; - TDO_EN <= IR_TDO_EN or ID_TDO_EN or IO_TDO_EN; - EN <= IR_TDO_EN & ID_TDO_EN & IO_TDO_EN; - assert EN = "000" or EN = "100" or EN = "010" or EN = "001" - report "TDO conflict in c4m_jtag_tap_controller" - severity ERROR; + CHECK_EN: if DEBUG generate + signal EN: std_logic_vector(2 downto 0) := "000"; + begin + EN <= IR_TDO_EN & ID_TDO_EN & IO_TDO_EN; + assert EN = "000" or EN = "100" or EN = "010" or EN = "001" + report "TDO conflict in c4m_jtag_tap_controller" + severity ERROR; + end generate CHECK_EN; end rtl;