From: Luke Kenneth Casson Leighton Date: Fri, 9 Oct 2020 12:42:29 +0000 (+0100) Subject: fix wishbone optional stall X-Git-Tag: 24jan2021ls180~7 X-Git-Url: https://git.libre-soc.org/?p=c4m-jtag.git;a=commitdiff_plain;h=08f70cd018dfe0899d8133f8158189bdaede92bf fix wishbone optional stall --- diff --git a/c4m/nmigen/jtag/tap.py b/c4m/nmigen/jtag/tap.py index 638cee6..35e0160 100755 --- a/c4m/nmigen/jtag/tap.py +++ b/c4m/nmigen/jtag/tap.py @@ -305,7 +305,7 @@ class TAP(Elaboratable): manufacturer_id=Const(0b10001111111, 11), part_number=Const(1, 16), version=Const(0, 4), - name=None, src_loc_at=0: + name=None, src_loc_at=0): assert((ir_width is None) or (isinstance(ir_width, int) and ir_width >= 2)) assert(len(version) == 4) @@ -667,8 +667,11 @@ class TAP(Elaboratable): m.d[domain] += wb.dat_w.eq(sr_data.o) m.next = "WRITEREAD" with m.State("READ"): - with m.If(~wb.stall): + if not hasattr(wb, "stall"): m.next = "READACK" + else: + with m.If(~wb.stall): + m.next = "READACK" with m.State("READACK"): with m.If(wb.ack): # Store read data in sr_data.i @@ -676,8 +679,11 @@ class TAP(Elaboratable): m.d[domain] += sr_data.i.eq(wb.dat_r) m.next = "IDLE" with m.State("WRITEREAD"): - with m.If(~wb.stall): + if not hasattr(wb, "stall"): m.next = "WRITEREADACK" + else: + with m.If(~wb.stall): + m.next = "WRITEREADACK" with m.State("WRITEREADACK"): with m.If(wb.ack): m.d[domain] += wb.adr.eq(wb.adr + 1)