From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 9 Oct 2020 13:12:02 +0000 (+0100)
Subject: comments on JTAG IO
X-Git-Url: https://git.libre-soc.org/?p=c4m-jtag.git;a=commitdiff_plain;h=51c4fe9dbd3c2977ba7f78c536f570b8a636144f

comments on JTAG IO
---

diff --git a/c4m/nmigen/jtag/tap.py b/c4m/nmigen/jtag/tap.py
index 6c290ed..473c067 100755
--- a/c4m/nmigen/jtag/tap.py
+++ b/c4m/nmigen/jtag/tap.py
@@ -445,6 +445,7 @@ class TAP(Elaboratable):
         io_sr = Signal(length)
         io_bd = Signal(length)
 
+        # Boundary scan "capture" mode.  makes I/O status available via SR
         with m.If(capture):
             idx = 0
             for conn in self._ios:
@@ -470,11 +471,17 @@ class TAP(Elaboratable):
                 else:
                     raise("Internal error")
             assert idx == length, "Internal error"
+
+        # "Shift" mode (sends out captured data on tdo, sets incoming from tdi)
         with m.Elif(shift):
             m.d.posjtag += io_sr.eq(Cat(self.bus.tdi, io_sr[:-1]))
+
+        # "Update" mode
         with m.Elif(update):
             m.d.negjtag += io_bd.eq(io_sr)
 
+        # sets up IO (pad<->core) or in testing mode depending on requested
+        # mode, via Muxes controlled by bd2core and bd2io
         idx = 0
         for conn in self._ios:
             if conn._iotype == IOType.In: