From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 17 Apr 2021 07:46:26 +0000 (+0100)
Subject: Document why FFSynchronizer is not used.
X-Git-Url: https://git.libre-soc.org/?p=c4m-jtag.git;a=commitdiff_plain;h=b4aa89548fd7439eda24979ab7d8a516c22a360b

Document why FFSynchronizer is not used.

Custom synchronization can be used with less latency than more generic
solutions.
---

diff --git a/c4m/nmigen/jtag/tap.py b/c4m/nmigen/jtag/tap.py
index 5acac07..e0c63db 100755
--- a/c4m/nmigen/jtag/tap.py
+++ b/c4m/nmigen/jtag/tap.py
@@ -563,6 +563,8 @@ class TAP(Elaboratable):
             # update signal is on the JTAG clockdomain, sr.oe is on `domain` clockdomain
             # latch update in `domain` clockdomain and see when it has falling edge.
             # At that edge put isir in sr.oe for one `domain` clockdomain
+            # Using this custom sync <> JTAG domain synchronization avoids the use of
+            # more generic but also higher latency CDC solutions like FFSynchronizer.
             update_core = Signal(name=sr.name+"_update_core")
             update_core_prev = Signal(name=sr.name+"_update_core_prev")
             m.d[domain] += [
@@ -669,6 +671,8 @@ class TAP(Elaboratable):
                 with m.State("READACK"):
                     with m.If(wb.ack):
                         # Store read data in sr_data.i and keep it there til next read
+                        # This is enough to synchronize between sync and JTAG clock domain
+                        # and no higher latency solutions like FFSynchronizer is needed.
                         m.d[domain] += sr_data.i.eq(wb.dat_r)
                         m.next = "IDLE"
                 with m.State("WRITEREAD"):