From: Staf Verhaegen <staf@stafverhaegen.be>
Date: Mon, 16 Dec 2019 15:36:45 +0000 (+0100)
Subject: Fix order of iocells in ioblock.
X-Git-Tag: 24jan2021ls180~22
X-Git-Url: https://git.libre-soc.org/?p=c4m-jtag.git;a=commitdiff_plain;h=c6f599cf783d050680d6f7c996269ec063f6403b

Fix order of iocells in ioblock.
---

diff --git a/c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl b/c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl
index bb31327..10a592c 100644
--- a/c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl
+++ b/c4m/vhdl/jtag/c4m_jtag_ioblock.vhdl
@@ -68,9 +68,9 @@ begin
   end generate;
   BDSRCONN: for i in 0 to IOS-2 generate
   begin
-    BDSR_IN(i) <= BDSR_OUT(i+1);
+    BDSR_IN(i+1) <= BDSR_OUT(i);
   end generate;
-  BDSR_IN(IOS-1) <= TDI;
+  BDSR_IN(0) <= TDI;
 
   -- Set IOMODE
   -- Currently SR_2Core or SR_Z are not used
@@ -85,7 +85,7 @@ begin
                 SR_Shift when ISSAMPLECMD and SHIFT = '1' else
                 SR_Normal;
 
-  TDO <= BDSR_OUT(BDSR_IN'high) when ISSAMPLECMD and SHIFT = '1' else
+  TDO <= BDSR_OUT(IOS-1) when ISSAMPLECMD and SHIFT = '1' else
          '0';
   TDO_EN <= '1' when ISSAMPLECMD and SHIFT = '1' else
             '0';