From 0022c71cf20007c831ac8c0c876e3772fef78feb Mon Sep 17 00:00:00 2001
From: Staf Verhaegen <staf@stafverhaegen.be>
Date: Sun, 15 Dec 2019 14:49:46 +0100
Subject: [PATCH 1/1] Remove unused bench

---
 test/rtl/vhdl/sampleshift.vhdl | 50 ----------------------------------
 1 file changed, 50 deletions(-)
 delete mode 100644 test/rtl/vhdl/sampleshift.vhdl

diff --git a/test/rtl/vhdl/sampleshift.vhdl b/test/rtl/vhdl/sampleshift.vhdl
deleted file mode 100644
index 62ec28b..0000000
--- a/test/rtl/vhdl/sampleshift.vhdl
+++ /dev/null
@@ -1,50 +0,0 @@
--- Test JTAG in the following way:
---  * reset JTAG interface
---  * load samplepreload command
---  * shift in/out sampled inputs + wanted outputs
---  * load extest command
---  * execute
-
-
-library ieee;
-use ieee.std_logic_1164.ALL;
-
-use work.c4m_jtag.ALL;
-
-entity bench_sampleshift is
-end bench_sampleshift;
-
-architecture rtl of bench_sampleshift is
-  signal TCK:   std_logic;
-  signal TMS:   std_logic;
-  signal TDI:   std_logic;
-  signal TDO:   std_logic;
-  signal TRST_N: std_logic;
-  
-  constant CLK_PERIOD:  time := 10 ns;
-
-  procedure ClkCycle(
-    signal CLK: out std_logic;
-    CLK_PERIOD: time
-  ) is
-  begin
-    CLK <= '0';
-    wait for CLK_PERIOD/4;
-    CLK <= '1';
-    wait for CLK_PERIOD/2;
-    CLK <= '0';
-    wait for CLK_PERIOD/4;
-  end ClkCycle;
-
-  procedure ClkCycles(
-    N:  integer;
-    signal CLK: out std_logic;
-    CLK_PERIOD: time
-  ) is
-  begin
-    for i in 1 to N loop
-      ClkCycle(CLK, CLK_PERIOD);
-    end loop;
-  end ClkCycles;
-  
-  procedure LoadIR(
-- 
2.30.2