# Intro Several things in this update: the OpenPower Foundation released their EULA (which is really exciting); RISC-V Foundation opens access to *some* mailing lists (but doesn't tackle the important stuff); we had a last-minute decision to go to FOSDEM to meet NLNet (and meet lots of nice people including someone from the EU Commission); we have new team members helping out (and making really good progress). Before we begin, however, we still have a high-priority task of finding a c++ / compiler developer for the NLNet-funded 3D MESA Driver project. EUR 50,000 is available, tax-free: [this thread](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003302.html) describes the scope, where you're pretty much at liberty to choose the approach that you'd like to take. # OpenPOWER Foundation releases the Power ISA EULA This is a big deal: the [EULA](https://openpowerfoundation.org/final-draft-of-the-power-isa-eula-released/) for anyone wishing to create a Power ISA compatible processor, it's been designed to be "libre-friendly". We will need to do a full review, and would appreciate feedback on it, via [this bugreport](http://bugs.libre-riscv.org/show_bug.cgi?id=179). A very quick read (like, right now): the really interesting bit is the combination of a royalty-free grant (as long as you are fully compliant with Power ISA) in combination with "if you initiate patent litigation, you lose all rights immediately". This provides an extremely strong disincentive for patent trolls to "try it on". It also actively encourages contributors to make sure that their work becomes an "official" part of Power, because that then gets them under the "umbrella" of protection as part of this EULA. My only concern - long-term - is the warning about Custom Extensions potentially being incompatible. We remember the Altivec clash very well, citing it as a historic lesson "How Not To Manage An ISA", because both Altivec's vector extension and the one it clashed with became high-profile public wide-spread common-usage extensions, and it damaged Power ISA's entire reputation and viability as a result. With our extensions being designed *knowingly* in advance to be high-profile, public, wide-spread and common-usage, we absolutely have to submit them as "official" extensions, or to work with the Open Power Foundation to create an official "escape-sequence" namespace system (ISAMUX/ISANS). As mentioned previously: anyone familiar with c++, we need a hardware version of "using namespace", in its entirety. First preliminary reading however, as Hugh kindly said privately to me, there's really nothing controversial, here, and it actually looks really good and extremely well-designed. # RISC-V Mailing Lists By complete contrast to how OpenPower is being managed... Since the last update, some of the RISC-V Mailing lists have become "open". There was no announcement. You can't get access to the prior archives. Critically important lists - such as the UNIX Platform Working Group - remain closed and secretive. Four years of requests by dozens of people to not be "Fake Open Source". It's like pulling teeth without an anaesthetic. Still, they're finally making an effort. They still have not responded (as is legally required under their Trademark obligations) to any of the twenty to thirty very deliberately public, prominent, and reasonable in-good-faith requests for inclusion in the *innovation* of RISC-V (not just its "use", its **innovation**) by Libre Businesses with "full transparency" as part of their core business objectives. Failing to allow public participation in the UNIX WG is particularly damaging to RISC-V's reputation. Telling u-boot and linux kernel developers "oh if you want to contribute to RISC-V kernel or u-boot you have to sign a secret agreement and sign up to a secretive mailing list", how well do you think that's going to go down? I really don't want to be the only person informing people about how RISC-V is still "Fake Open Source" and how it's effectively cartelled (and is running afoul of anti-trust laws). If someone else can take over responsibility for this, I'd much prefer to keep the LibreSOC a positive, welcoming and progressive community. # FOSDEM 2020 As mentioned [on the list](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003660.html) we received a message from Michiel that they were financially backing over *twenty five* projects that were attending and giving talks at FOSDEM! They also let everyone know that the nice people from Brussels were going to be attending. At which point, I went, "ah." and scrambled like mad to make sure I was there, presenting a smiling face to ensure that the nice EU Commission people knew that their money was definitely being put to good use. This actually turns out to be a serious problem for the EU. My friend Phil decided a few years ago to go along to one of these "Independent Grant Review" processes. He basically said that not only was the quality of the applications absolutely atrocious, but worse than that the people volunteering to do the review - ordinary people like solicitors, office managers, farmers - had precisely zero technical knowledge and couldn't tell the difference between a good application, a bad application or a deceptive application. Now expand that up to applications for EUR 1 million. 10 million. Consequently, for NLNet to be actually making sure that the money they've been given responsibility for actually reaches actual programmers who actually release actual free software which actually improves actual real-world infrastructure for the benefit of EU Citizens (and incidentally the rest of the world) is a bit of an eye-opener. I had a brief chat with the person from the EU Commission. He was delighted to be able to see the sheer number of people involved and being sponsored by NLNet. I had an opportunity to ask him about the anti-trust aspects of the RISC-V Foundation's ongoing intransigent behaviour. He initially expressed puzzlement and some concern, because the EU is funding quite a lot of RISC-V projects, and none of them had any issues. I asked him a very simple question: "how many of those projects are simply *implementing* existing RISC-V Standards?", and he replied, "all of them". I then asked, "how many of those projects are *innovating*, developing alternative extensions to what is dictated by the RISC-V Foundation?" With the answer being "none", *that* was the point at which he understood the extent of the problem, and (with the systematic failure to respond to in-good-faith requests to participate in innovation), how the RISC-V Foundation - and its members, by way of them having "voting power" and thus having direct influence over how the RISC-V Foundation is run - are at risk of violating EU anti-trust legislation. oops. # Meeting other LibreSOC people It was fantastic to meet Staf, and talk to him about the upcoming test chip that he'll be doing. He will be including an SR-Latch cell for us, because it saves such a vast number of gates in the Dependency Matrices if we use a D-Flip-Flop: 50,000 gates if we use an SR-Latch, and a *quarter of a million* if we use a DFF. There were several other people we met, including one who can help us to develop a [BSP](http://bugs.libre-riscv.org/show_bug.cgi?id=164) (Board Support Package). Also we got a chance to talk to several other people with cross-over skillsets. This alone was worth the time to go to FOSDEM, this year. Now what we have to do is make sure to plan properly in advance, to put in some papers at appropriate conferences. We really need to organise a proper conference where everyone meets up. # New members We created an [about us](http://libre-riscv.org/about_us) page for members (if you'd like to help do just sign up) We have now four new people who are contributing: Cole, Veera, Yehowshua and Michael. Veera is a sysadmin and I would be delighted to get some help managing the server. In particular I would like to install public-inbox but it requires exim4 and mailman to be converted to Maildir. This is the kind of thing that would be great to hand over to another sysadmin. Cole just loves the idea of what we're doing and wants to learn, so what I've asked him to do is to simply follow instructions and tutorials, and give us feedback on whether they're clear. If not, that's a problem that needs to be fixed, and, contrary to expectations, it's precisely his *lack* of experience is absolutely perfect for testing that. Yehowshua - a friend of Michael - got in touch around the time of the last update, and he's been helping find funding. As he is at Georgia Tech, he will be applying for the LAUNCH-X Programme, funded initially by my old boss, Chris Klaus. Chris has been really helpful here, he's really delighted to be able to help other Georgia Tech Alumni. Yehowshua has also been encouraging and helping with a redesign of the website CSS, and been instrumental in a major rewrite of the wording. Michael has just jumped straight in to the processor design. Yehowshua tells me he first met Michael as he was sitting in a cafe with an FPGA board attached to his laptop. He's another of these extremely rare self-motivated, self-taught, "auto-learner" types who are worth their weight in gold. He's currently helping with the [Dynamic SIMD partitioner](http://bugs.libre-riscv.org/show_bug.cgi?id=132) which we will need to do a special update about, at some point. One particularly fascinating common theme between all of us turns out to be music, maths, and high-coordination sports. Yehowshua loves skate-boarding, and I love rollerblading, for example. One very interesting thing came out of the contact with Georgia Tech's CREATE-X Programme: we are looking to create a Public Benefit Corporation. More on this later, however it became clear to us that we need good "communicators". Not so much more "programmers", although we do still urgently need a c++ compiler type person for the [MESA 3D Driver](https://libre-riscv.org/nlnet_2019_amdvlk_port/). We need entrepreneurs - especially undergraduates from Georgia Tech - willing to take on the responsibility for going out and finding, meeting and talking to clients and customers, coming up with ideas, and giving us, as "Engineers", the feedback we need to target the processor at an actual market. # Other stuff The extra NLNet budgets are helping, as is the continued sponsorship from Purism. I am beginning to get slightly overloaded with the managerial and bureaucratic tasks, combined with the "Engineering" tasks that, as is always the case, require 100% sustained week-long focus. These two (three? four? five?) things are clearly incompatible. whoops. I still have to coordinate the NLNet tasks for each of the Memorandums of Understanding, at which point the tasks listed on them, people can then get paid for completing them. I can't quite get over the fact that NLNet was happy to allocate such a huge amount of money to this project, it's amazing, humbling, and a huge responsibility. Also, we got word that the 180nm tape-outs (one in March 2020, one in October 2020) are actually subsidised. In addition, we have *verbal* informal confirmation that some proprietary cell libraries are about to be announced as being libre-licensed. This is particularly fascinating. Reading between the lines, we can surmise / hypothesise that various "noises" about how hardware is proprietary and how difficult it is to do Libre / Open ASICs (people basically give up and don't even bother because it's so ridiculously costly, no one individual Libre / Open ASIC developer could possibly imagine themselves contributing to, let alone raising the multi-million funds for, say, a 4 GHz 10-stage 12-core SMP multi-issue processor, so they don't even bother to design or release anything that *could* be part of such a design), and consequently it looks like various large companies who shall remain nameless for now are quietly and subtly waving around very large amounts of cash in front of the noses of Foundries, tempting them to release things like Cell Libraries under Libre Licenses. Given that the U.S. Trade War has recently caused a whopping **twelve percent** drop in [ASIC sales](https://hardware.slashdot.org/story/20/02/07/2157253/chip-industry-had-worst-sales-year-since-dot-com-bubble-burst), with USA ASIC sales dropping **twenty four percent**, they're probably "quite open" shall we say to large up-front cash deals. Anyway, as always, if you'd like to help out (and actually receive money for doing so), we have a nice shiny new section [on the website](https://libre-riscv.org/), "How can i help?" and there is a heck of a lot to do. Feel free to get in touch, any time.