u500: disable PCIe
[freedom-sifive.git] / build.sbt
1 // See LICENSE for license details.
2 organization := "com.sifive"
3 name := "freedom"
4 version := "0.1.0"
5
6 lazy val commonSettings = Seq(
7 scalaVersion := "2.11.7", // This needs to match rocket-chip's scalaVersion
8 scalacOptions ++= Seq(
9 "-deprecation",
10 "-feature",
11 "-unchecked",
12 "-Xfatal-warnings",
13 "-language:reflectiveCalls"
14 )
15 )
16
17 // A RootProject (not well-documented) tells sbt to treat the target directory
18 // as its own root project, reading its build settings. If we instead used the
19 // normal `project in file()` declaration, sbt would ignore all of rocket-chip's
20 // build settings, and therefore not understand that it has its own dependencies
21 // on chisel, etc.
22 lazy val rocketChip = RootProject(file("rocket-chip"))
23
24 lazy val sifiveBlocks = (project in file("sifive-blocks")).
25 dependsOn(rocketChip).
26 settings(commonSettings: _*)
27
28 lazy val fpgaShells = (project in file("fpga-shells")).
29 dependsOn(rocketChip, sifiveBlocks).
30 settings(commonSettings: _*)
31
32 lazy val freedomPlatforms = (project in file(".")).
33 dependsOn(rocketChip, sifiveBlocks, fpgaShells).
34 settings(commonSettings: _*)