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Initial commit.
[freedom-sifive.git] / fpga / e300artydevkit / constrs / arty-config.xdc
1 set_property -dict [list \
2 CONFIG_VOLTAGE {3.3} \
3 CFGBVS {VCCO} \
4 BITSTREAM.CONFIG.SPI_BUSWIDTH {4} \
5 ] [current_design]
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