fpga/u500vc707devkit/Makefile

   1 VIVADO ?= vivado
   2 VIVADOFLAGS := \
   3         -nojournal -mode batch \
   4         -source script/board.tcl \
   5         -source script/prologue.tcl
   6
   7 bit := obj/system.bit
   8 $(bit): script/impl.tcl  script/init.tcl
   9         VSRC_TOP=$(VSRC_TOP) VSRC_CONSTS=$(VSRC_CONSTS) EXTRA_VSRCS="$(EXTRA_VSRCS)" $(VIVADO) $(VIVADOFLAGS) -source script/init.tcl -source script/impl.tcl
  10
  11 .PHONY: bit
  12 bit: $(bit)
  13
  14 mcs := obj/system.mcs
  15 $(mcs): $(bit)
  16         $(VIVADO) $(VIVADOFLAGS) script/cfgmem.tcl -tclargs $@ $^
  17
  18 .PHONY: mcs
  19 mcs: $(mcs)
  20
  21 .PHONY: clean
  22 clean::
  23         rm -rf -- .Xil .ip_user_files *.os obj src/generated usage_statistics_webtalk.xml usage_statistics_webtalk.html *.log