arch-power: Fix move condition field instructions

[gem5.git] / src / arch / power / isa / bitfields.isa

diff --git a/src/arch/power/isa/bitfields.isa b/src/arch/power/isa/bitfields.isa
index 3bfea530658533f6f3ffc7a586c2ee306554bc29..276242eae3fb81845857a2deaa87c630ecae4f36 100644 (file)
--- a/src/arch/power/isa/bitfields.isa
+++ b/src/arch/power/isa/bitfields.isa
@@ -73,6 +73,7 @@ def bitfield SPR           <20:11>;
 
 // FXM field for mtcrf instruction
 def bitfield FXM           <19:12>;
+def bitfield S             <20>;
 
 // Branch fields
 def bitfield BO            <25:21>;