}});
}
+ format IntImmTrapOp {
+ 3: twi({{ Ra_sw }});
+ 2: tdi({{ Ra }});
+ }
+
4: decode VA_XO {
// Arithmetic instructions that use source registers Ra, Rb and Rc,
true);
}
+ format IntTrapOp {
+ 4: tw({{ Ra_sw }}, {{ Rb_sw }});
+ 68: td({{ Ra }}, {{ Rb }});
+ }
+
format StoreIndexOp {
663: stfsx({{ Mem_sf = Fs_sf; }});
727: stfdx({{ Mem_df = Fs; }});