arch-power: Refactor instruction decoding
authorSandipan Das <sandipan@linux.ibm.com>
Sat, 6 Feb 2021 11:46:25 +0000 (17:16 +0530)
committerSandipan Das <sandipan@linux.ibm.com>
Mon, 15 Feb 2021 08:32:37 +0000 (14:02 +0530)
commit9eb44b1e854905d1354398409ac53a9f552f2fa7
tree3a1e06df9199a3068fa87bc8ce0e732968fe7ace
parent439e94049ccf85edf88b2cb045012de7c4f21141
arch-power: Refactor instruction decoding

This reorders the decoding logic based on the category of
instructions. The ordering scheme used here is roughly in
line with the Power ISA manual as shown below.
  * Branch facility instructions
      * Branch instructions
      * Condition Register instructions
      * System Call instructions
  * Fixed-point facility instructions
      * Load instructions
      * Store instructions
      * Arithmetic instructions
      * Compare instructions
      * Logical instructions
      * Rotate and Shift instructions
      * Move To/From System Register instructions
  * Floating-point facility instructions
      * Load instructions
      * Store instructions
      * Arithmetic instructions
      * Move instructions
      * Rounding and Conversion instructions
      * Compare instructions
      * Status and Control Register instructions

Change-Id: Ia2d457967bfebb7b20163b56db1cbbe03ac17ceb
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
src/arch/power/isa/decoder.isa