Major changes to how SimObjects are created and initialized. Almost all
authorNathan Binkert <nate@binkert.org>
Tue, 24 Jul 2007 04:51:38 +0000 (21:51 -0700)
committerNathan Binkert <nate@binkert.org>
Tue, 24 Jul 2007 04:51:38 +0000 (21:51 -0700)
commitabc76f20cb98c90e8dab416dd16dfd4a954013ba
treef3131e68a09c1b4537e17df5b14df21df53746e4
parent552097b92e37fb4c0fd27960afe0a03c02894f11
Major changes to how SimObjects are created and initialized.  Almost all
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
139 files changed:
src/SConscript
src/arch/alpha/AlphaTLB.py
src/arch/alpha/freebsd/system.cc
src/arch/alpha/freebsd/system.hh
src/arch/alpha/linux/system.cc
src/arch/alpha/linux/system.hh
src/arch/alpha/system.cc
src/arch/alpha/system.hh
src/arch/alpha/tlb.cc
src/arch/alpha/tru64/system.cc
src/arch/alpha/tru64/system.hh
src/arch/sparc/SparcTLB.py
src/arch/sparc/system.cc
src/arch/sparc/system.hh
src/arch/sparc/tlb.cc
src/cpu/SConscript
src/cpu/base.cc
src/cpu/exetrace.cc
src/cpu/func_unit.cc
src/cpu/intr_control.cc
src/cpu/memtest/memtest.cc
src/cpu/o3/alpha/cpu_builder.cc
src/cpu/o3/checker_builder.cc
src/cpu/o3/cpu.cc
src/cpu/o3/fu_pool.cc
src/cpu/o3/inst_queue_impl.hh
src/cpu/o3/mips/cpu_builder.cc
src/cpu/o3/sparc/cpu_builder.cc
src/cpu/op_class.cc [deleted file]
src/cpu/op_class.hh
src/cpu/ozone/checker_builder.cc
src/cpu/ozone/cpu_builder.cc
src/cpu/ozone/simple_cpu_builder.cc
src/cpu/simple/atomic.cc
src/cpu/simple/base.cc
src/cpu/simple/timing.cc
src/cpu/trace/opt_cpu.cc
src/cpu/trace/reader/ibm_reader.cc
src/cpu/trace/reader/itx_reader.cc
src/cpu/trace/reader/m5_reader.cc
src/cpu/trace/reader/mem_trace_reader.cc [deleted file]
src/cpu/trace/trace_cpu.cc
src/dev/Ethernet.py
src/dev/SConscript
src/dev/alpha/console.cc
src/dev/alpha/console.hh
src/dev/alpha/tsunami.cc
src/dev/alpha/tsunami_cchip.cc
src/dev/alpha/tsunami_cchip.hh
src/dev/alpha/tsunami_io.cc
src/dev/alpha/tsunami_io.hh
src/dev/alpha/tsunami_pchip.cc
src/dev/alpha/tsunami_pchip.hh
src/dev/baddev.cc
src/dev/baddev.hh
src/dev/disk_image.cc
src/dev/etherbus.cc
src/dev/etherdump.cc
src/dev/etherint.cc
src/dev/etherlink.cc
src/dev/ethertap.cc
src/dev/i8254xGBe.cc
src/dev/i8254xGBe.hh
src/dev/ide_ctrl.cc
src/dev/ide_ctrl.hh
src/dev/ide_disk.cc
src/dev/io_device.cc
src/dev/io_device.hh
src/dev/isa_fake.cc
src/dev/isa_fake.hh
src/dev/ns_gige.cc
src/dev/ns_gige.hh
src/dev/pciconfigall.cc
src/dev/pcidev.cc
src/dev/pcidev.hh
src/dev/platform.cc
src/dev/simconsole.cc
src/dev/simple_disk.cc
src/dev/sinic.cc
src/dev/sinic.hh
src/dev/sparc/dtod.cc
src/dev/sparc/dtod.hh
src/dev/sparc/iob.cc
src/dev/sparc/iob.hh
src/dev/sparc/mm_disk.cc
src/dev/sparc/mm_disk.hh
src/dev/sparc/t1000.cc
src/dev/uart.cc
src/dev/uart.hh
src/dev/uart8250.cc
src/dev/uart8250.hh
src/mem/MemObject.py
src/mem/bridge.cc
src/mem/bridge.hh
src/mem/bus.cc
src/mem/cache/cache_builder.cc
src/mem/cache/coherence/coherence_protocol.cc
src/mem/cache/coherence/coherence_protocol.hh
src/mem/cache/tags/SConscript
src/mem/cache/tags/repl/gen.cc
src/mem/cache/tags/repl/repl.cc [deleted file]
src/mem/dram.cc
src/mem/dram.hh
src/mem/mem_object.cc
src/mem/mem_object.hh
src/mem/page_table.cc
src/mem/physical.cc
src/mem/physical.hh
src/python/SConscript
src/python/generate.py [new file with mode: 0644]
src/python/m5/SimObject.py
src/python/m5/__init__.py
src/python/m5/environment.py [new file with mode: 0644]
src/python/m5/params.py
src/python/m5/simulate.py [new file with mode: 0644]
src/python/m5/ticks.py
src/python/swig/inet.i [new file with mode: 0644]
src/python/swig/pyobject.cc
src/python/swig/pyobject.hh
src/python/swig/range.i [new file with mode: 0644]
src/python/swig/sim_object.i
src/python/swig/time.i [new file with mode: 0644]
src/sim/SConscript
src/sim/builder.cc [deleted file]
src/sim/builder.hh [deleted file]
src/sim/core.cc
src/sim/core.hh
src/sim/debug.cc
src/sim/param.cc [deleted file]
src/sim/param.hh [deleted file]
src/sim/process.cc
src/sim/root.cc
src/sim/serialize.cc
src/sim/sim_events.cc
src/sim/sim_object.cc
src/sim/sim_object.hh
src/sim/system.cc
src/sim/system.hh
util/SConscript [new file with mode: 0644]