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arch-arm: Add destRegIdxArr arrays to TME instructions
2021-02-03
Giacomo Travaglini
arch-arm: Add destRegIdxArr arrays to TME instructions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-02-02
Giacomo Travaglini
ext: testlib loading tests from multiple directories
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-29
Giacomo Travaglini
configs: Use MmioVirtIO for disk image in baremetal.py
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-27
Giacomo Travaglini
dev: Fix reset of virtio devices
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm: Instantiate Generic Watchdog in Foundation...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm: Implement Generic Watchdog
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm: A SystemCounterListener doesn't have to be...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm: Add a PL111 to the VExpress_GEM5_Foundation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm: Add a fake SP810 to the VExpress_GEM5_Foundation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
system-arm: Enabled HDLcd by default in DTS
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-26
Giacomo Travaglini
dev-arm, system-arm: Remove HDLcd from VExpress_GEM5_VX...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-25
Giacomo Travaglini
system-arm: Move display node into a shared DTS file
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-25
Giacomo Travaglini
arch-arm: Add set_reg_idx_arr to SveStructMemSIMicroopDeclare
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2021-01-23
Giacomo Travaglini
arch-arm: Fix Compare and Swap Pair instructions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-19
Giacomo Travaglini
tests: Fix syntax error in cpu_tests/test.py
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-18
Giacomo Travaglini
arch-arm: dtb_addr is already encoding the loadAddrOffset
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2021-01-07
Giacomo Travaglini
configs: Remove default bootscript option for fs_bigLITTLE.py
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-12-08
Giacomo Travaglini
cpu: MinorCPU not updating cycle counter value
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-12-03
Giacomo Travaglini
cpu, sim: Remove unused System::totalNumInst
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-27
Giacomo Travaglini
util: Port util to python3
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-11-25
Giacomo Travaglini
arch-arm: VSTCR_EL2/VSTTBR_EL2 accessible in secure...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-25
Giacomo Travaglini
arch-arm: Add SECURE_RD/WR flags to miscRegInfo
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-25
Giacomo Travaglini
dev: -Wdeprecated-copy not available on all supported...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-11-20
Giacomo Travaglini
python: Remove SortedDict from python utilities
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-20
Giacomo Travaglini
scons, python: Remove SmartDict from python utilities
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-20
Giacomo Travaglini
python: Fix toBool converter
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-19
Giacomo Travaglini
fastmodel: Replace xrange with range to be python3...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-19
Giacomo Travaglini
fastmodel: Use BaseMMU in the CortexR52 wrapper
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-09
Giacomo Travaglini
tests: Add realview64-kvm.py test to quick regressions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-09
Giacomo Travaglini
tests: Add realview64-kvm.py testing platform
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-09
Giacomo Travaglini
tests: Update guest binaries used by regressions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-03
Giacomo Travaglini
arch-arm: Do not use _flushMva for TLBI IPA
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-03
Giacomo Travaglini
arch-arm: TlbEntry flush to be considered as functional...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-03
Giacomo Travaglini
arch-arm: Fix implementation of TLBI_VMALL instructions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-03
Giacomo Travaglini
arch-arm: Add el2Enabled cached variable
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-03
Giacomo Travaglini
cpu, fastmodel: Remove the old getDTBPtr/getITBPtr...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-02
Giacomo Travaglini
dev-arm: Instantiate SCMI in VExpress_GEM5 platforms
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-02
Giacomo Travaglini
dev-arm: SCMI Implementation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-11-02
Giacomo Travaglini
dev-arm: Implement Arm MHU (Message Handling Unit)
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-02
Giacomo Travaglini
tests: System is expecting a kvm_vm param for KvmVM
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-02
Giacomo Travaglini
kvm, arm: Add parameter to force simulation of Gicv2
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-11-02
Giacomo Travaglini
dev-arm: Add doorbell interface class
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-11-02
Giacomo Travaglini
dev-arm: Define a ParentMem object for DTB autogen
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-27
Giacomo Travaglini
sim: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-27
Giacomo Travaglini
arch-x86: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-27
Giacomo Travaglini
arch-sparc: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-27
Giacomo Travaglini
arch-riscv: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-26
Giacomo Travaglini
mem: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-23
Giacomo Travaglini
arch-arm: Fix implementation of TLBI ALLEx instructions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-23
Giacomo Travaglini
arch-arm: Rewrite the TLB flushing interface
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-23
Giacomo Travaglini
arch-arm: Reimplement TLB::flushAll
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-23
Giacomo Travaglini
arch-arm: TLBIALL/TLBIASID/TLBIMVA base classes for...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-21
Giacomo Travaglini
arch: Use getTlb in BaseMMU to reduce boilerplate
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-21
Giacomo Travaglini
arch-arm: Replace any getDTBPtr/getITBPtr usage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-21
Giacomo Travaglini
cpu: Remove unused demapInstPage and demapDataPage
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-21
Giacomo Travaglini
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-20
Giacomo Travaglini
dev-arm: Adding a SRAM in VExpress_GEM5_V1
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-17
Giacomo Travaglini
arch-arm: Implement ArmPMU DTB generation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-10-17
Giacomo Travaglini
dev: Use generateFdtProperty in the PioDevice
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-17
Giacomo Travaglini
dev-arm: Use generateFdtProperty in the GenericTimer
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-17
Giacomo Travaglini
dev-arm: Automate FdtProperty generation with ArmInterruptPin
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-17
Giacomo Travaglini
dev-arm, fastmodel: Rewrite Gic.interruptCells
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-17
Giacomo Travaglini
dev-arm: Define ArmInterruptType
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-15
Giacomo Travaglini
configs: Remove dangling reference to bus port in devices.py
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-08
Giacomo Travaglini
arch-arm: Default ArmSystem to AArch64
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-07
Giacomo Travaglini
fastmodel: Add IrisMMU model
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-10-07
Giacomo Travaglini
arch: Add generic BaseMMU
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-30
Giacomo Travaglini
cpu: Never use a empty byteEnable
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-30
Giacomo Travaglini
arch-x86: Add byteEnable mask in x86 memhelpers
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-30
Giacomo Travaglini
arch-arm: Using new "raw" memhelpers
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-30
Giacomo Travaglini
arch: Add raw read/writeMem helpers
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-30
Giacomo Travaglini
arch: Do value-initialization for MemOperand
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-29
Timothy Hayes
arch-arm: Instantiate a single HTM checkpoint at ISA...
Maintainer: Giacomo Travaglini <
giacomo.travaglini@arm.com
>
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2020-09-29
Timothy Hayes
cpu: Allow storing an invalid HTM checkpoint
Maintainer: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-29
Giacomo Travaglini
ext: Add timing indications to every TestCase
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-25
Richard Cooper
ext: Monkeypatch os.waitpid to extract CPU time from...
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2020-09-22
Giacomo Travaglini
dev-arm: Implement GICv4.1 GICD_TYPER2 as RES0
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-22
Giacomo Travaglini
arch-arm: TLBI ALLE2IS should broadcast to the IS domain
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-13
Giacomo Travaglini
arch-arm: Fix ArmISA namespace requirement for Arm KVM
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-09
Giacomo Travaglini
arch-arm: Fix ArmISA namespace requirement for TME...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
cpu: HTM Implementation for O3CPU
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
cpu: HTM Implementation for TimingCPU
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
mem-ruby: HTM mem implementation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
mem: Add HTM fields to the Packet object
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2020-09-08
Timothy Hayes
cpu: Base dyn inst HTM flags getter
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
sim: Add HTM Generic Fault
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
cpu: Add HTM ThreadContext API
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-08
Timothy Hayes
cpu: Add HTM ExecContext API
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-07
Timothy Hayes
mem: Add HTM fields to Request
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-07
Timothy Hayes
cpu: Add HTM CPU API
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-07
Timothy Hayes
cpu: Add HTM Instruction Flags
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-07
Timothy Hayes
cpu: Add HtmCpu DebugFlag
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2020-09-02
Timothy Hayes
mem: Relax packet limit in packet queue
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-02
Timothy Hayes
arch: Add uReset helper to UPCState
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-09-02
Timothy Hayes
arch, mem: Initial Hardware Transactional Memory implementation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-08-28
Giacomo Travaglini
arch-arm: Fix coding style in addressTranslation methods
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-08-28
Giacomo Travaglini
arch-arm: Check if PAC is implemented before executing...
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-08-28
Giacomo Travaglini
arch-arm: Introduce HavePACExt helper
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-08-26
Giacomo Travaglini
arch-arm: Rewrite addressTranslation to use BitUnions
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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2020-08-26
Giacomo Travaglini
arch-arm: Remove deadcode from AArch64 address translation
...off-by: Giacomo Travaglini <
giacomo.travaglini@arm.com
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