f6b26c2ad76c7231ae0acc177cbaf5659d07697a
1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Elaboratable
6 from nmigen
.cli
import main
, verilog
9 from ieee754
.fpcommon
.fpbase
import FPNumIn
, FPNumOut
, FPNumBaseRecord
10 from ieee754
.fpcommon
.fpbase
import FPState
, FPNumBase
11 from ieee754
.fpcommon
.getop
import FPBaseData
16 def __init__(self
, width
, pspec
, m_extra
):
18 # NOTE: difference between z and oz is that oz is created by
19 # special-cases module(s) and will propagate, along with its
20 # "bypass" signal out_do_z, through the pipeline, *disabling*
21 # all processing of all subsequent stages.
22 self
.a
= FPNumBaseRecord(width
, m_extra
) # operand a
23 self
.b
= FPNumBaseRecord(width
, m_extra
) # operand b
24 self
.z
= FPNumBaseRecord(width
, False) # denormed result
25 self
.oz
= Signal(width
, reset_less
=True) # "finished" (bypass) result
26 self
.out_do_z
= Signal(reset_less
=True) # "bypass" enabled
27 self
.ctx
= FPBaseData(width
, pspec
)
28 self
.mid
= self
.ctx
.mid
39 ret
= [self
.z
.eq(i
.z
), self
.out_do_z
.eq(i
.out_do_z
), self
.oz
.eq(i
.oz
),
40 self
.a
.eq(i
.a
), self
.b
.eq(i
.b
), self
.ctx
.eq(i
.ctx
)]
44 class FPAddDeNormMod(FPState
, Elaboratable
):
46 def __init__(self
, width
, pspec
, m_extra
):
49 self
.m_extra
= m_extra
54 return FPSCData(self
.width
, self
.pspec
, self
.m_extra
)
57 return FPSCData(self
.width
, self
.pspec
, self
.m_extra
)
62 def setup(self
, m
, i
):
63 """ links module to inputs and outputs
65 m
.submodules
.denormalise
= self
66 m
.d
.comb
+= self
.i
.eq(i
)
68 def elaborate(self
, platform
):
70 m
.submodules
.denorm_in_a
= in_a
= FPNumBase(self
.i
.a
)
71 m
.submodules
.denorm_in_b
= in_b
= FPNumBase(self
.i
.b
)
72 #m.submodules.denorm_out_a = self.o.a
73 #m.submodules.denorm_out_b = self.o.b
74 #m.submodules.denorm_out_z = self.o.z
76 with m
.If(~self
.i
.out_do_z
):
77 # XXX hmmm, don't like repeating identical code
78 m
.d
.comb
+= self
.o
.a
.eq(self
.i
.a
)
79 with m
.If(in_a
.exp_n127
):
80 m
.d
.comb
+= self
.o
.a
.e
.eq(self
.i
.a
.N126
) # limit a exponent
82 m
.d
.comb
+= self
.o
.a
.m
[-1].eq(1) # set top mantissa bit
84 m
.d
.comb
+= self
.o
.b
.eq(self
.i
.b
)
85 with m
.If(in_b
.exp_n127
):
86 m
.d
.comb
+= self
.o
.b
.e
.eq(self
.i
.b
.N126
) # limit a exponent
88 m
.d
.comb
+= self
.o
.b
.m
[-1].eq(1) # set top mantissa bit
90 m
.d
.comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)
91 m
.d
.comb
+= self
.o
.z
.eq(self
.i
.z
)
92 m
.d
.comb
+= self
.o
.out_do_z
.eq(self
.i
.out_do_z
)
93 m
.d
.comb
+= self
.o
.oz
.eq(self
.i
.oz
)
98 class FPAddDeNorm(FPState
):
100 def __init__(self
, width
, id_wid
):
101 FPState
.__init
__(self
, "denormalise")
102 self
.mod
= FPAddDeNormMod(width
)
103 self
.out_a
= FPNumBaseRecord(width
)
104 self
.out_b
= FPNumBaseRecord(width
)
106 def setup(self
, m
, i
):
107 """ links module to inputs and outputs
111 m
.d
.sync
+= self
.out_a
.eq(self
.mod
.out_a
)
112 m
.d
.sync
+= self
.out_b
.eq(self
.mod
.out_b
)
115 # Denormalised Number checks