switch to using nmutil's FHDLTestCase
[ieee754fpu.git] / src / ieee754 / fsgnj / pipeline.py
1 """IEEE754 Floating Point Conversion
2
3 Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
4 Copyright (C) 2020 Michael Nolan <mtnolan2640@gmail.com>
5
6 """
7
8 from nmutil.singlepipe import ControlBase
9 from nmutil.concurrentunit import ReservationStations, num_bits
10
11 from ieee754.pipeline import PipelineSpec, DynamicPipe
12
13 from ieee754.fsgnj.fsgnj import FSGNJPipeMod
14
15
16 class FSGNJStage(DynamicPipe):
17 """ FPConversion and De-norm
18 """
19
20 def __init__(self, in_pspec):
21 stage = FSGNJPipeMod(in_pspec)
22 in_pspec.stage = stage
23 super().__init__(in_pspec)
24
25
26 class FSGNJBasePipe(ControlBase):
27 def __init__(self, pspec):
28 ControlBase.__init__(self)
29 self.pipe1 = FSGNJStage(pspec)
30 self._eqs = self.connect([self.pipe1, ])
31
32 def elaborate(self, platform):
33 m = ControlBase.elaborate(self, platform)
34 m.submodules.fsgnj = self.pipe1
35 m.d.comb += self._eqs
36 return m
37
38
39 class FSGNJMuxInOut(ReservationStations):
40 """ Reservation-Station version of FPCVT pipeline.
41
42 * fan-in on inputs (an array of FPBaseData: a,b,mid)
43 * converter pipeline (alu)
44 * fan-out on outputs (an array of FPPackData: z,mid)
45
46 Fan-in and Fan-out are combinatorial.
47 """
48
49 def __init__(self, in_width, num_rows, op_wid=2):
50 self.op_wid = op_wid
51 self.id_wid = num_bits(num_rows)
52
53 self.in_pspec = PipelineSpec(in_width, self.id_wid, self.op_wid)
54
55 self.alu = FSGNJBasePipe(self.in_pspec)
56 ReservationStations.__init__(self, num_rows)