add partition test add unit test
[ieee754fpu.git] / src / ieee754 / part / partsig.py
1 # SPDX-License-Identifier: LGPL-2.1-or-later
2 # See Notices.txt for copyright information
3
4 """
5 Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
6
7 dynamic-partitionable class similar to Signal, which, when the partition
8 is fully open will be identical to Signal. when partitions are closed,
9 the class turns into a SIMD variant of Signal. *this is dynamic*.
10
11 http://bugs.libre-riscv.org/show_bug.cgi?id=132
12 """
13
14 from nmigen import (Module, Signal, Elaboratable,
15 )
16 from ieee754.part_mul_add.adder import PartitionedAdder
17
18 class PartitionedSignal(Elaboratable):
19 def __init__(self, partition_points, *args, **kwargs):
20 self.partpoints = partition_points
21 self.sig = Signal(*args, **kwargs)
22 self.modnames = {}
23 for name in ['add']:
24 self.modnames[name] = 0
25 self.m = Module()
26
27 def elaborate(self, platform):
28 return self.m
29
30 def get_modname(self, category):
31 self.modnames[category] += 1
32 return "%s%d" % (category, self.modnames[category])
33
34 def eq(self, val):
35 return self.sig.eq(val)
36
37 def __xor__(self, other):
38 if isinstance(other, PartitionedSignal):
39 return self.sig ^ other.sig
40 return self.sig ^ other
41
42 def __add__(self, other):
43 shape = self.sig.shape()
44 pa = PartitionedAdder(shape[0], self.partpoints)
45 setattr(self.m.submodules, self.get_modname('add'), pa)
46 comb = self.m.d.comb
47 comb += pa.a.eq(self.sig)
48 if isinstance(other, PartitionedSignal):
49 comb += pa.b.eq(other.sig)
50 else:
51 comb += pa.b.eq(other)
52 return pa.output