Apparently PartitionedEqGtGe is already conformant
[ieee754fpu.git] / src / ieee754 / part_cmp / experiments / equal_ortree.py
1 # SPDX-License-Identifier: LGPL-2.1-or-later
2 # See Notices.txt for copyright information
3
4 """
5 Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
6
7 dynamically-partitionable "comparison" class, directly equivalent
8 to Signal.__eq__ except SIMD-partitionable
9
10 See:
11
12 * http://libre-riscv.org/3d_gpu/architecture/dynamic_simd/eq
13 * http://bugs.libre-riscv.org/show_bug.cgi?id=132
14 """
15
16 from nmigen import Signal, Module, Elaboratable, Cat, C, Mux, Repl
17 from nmigen.cli import main
18
19 from ieee754.part_mul_add.partpoints import PartitionPoints
20 from ieee754.part_cmp.experiments.eq_combiner import EQCombiner
21
22
23 class PartitionedEq(Elaboratable):
24
25 def __init__(self, width, partition_points):
26 """Create a ``PartitionedEq`` operator
27 """
28 self.width = width
29 self.a = Signal(width, reset_less=True)
30 self.b = Signal(width, reset_less=True)
31 self.partition_points = PartitionPoints(partition_points)
32 self.mwidth = len(self.partition_points)+1
33 self.output = Signal(self.mwidth, reset_less=True)
34 if not self.partition_points.fits_in_width(width):
35 raise ValueError("partition_points doesn't fit in width")
36
37 def elaborate(self, platform):
38 m = Module()
39 comb = m.d.comb
40 m.submodules.eqc = eqc = EQCombiner(self.mwidth)
41
42 # make a series of "not-eqs", splitting a and b into partition chunks
43 nes = Signal(self.mwidth, reset_less=True)
44 nel = []
45 keys = list(self.partition_points.keys()) + [self.width]
46 start = 0
47 for i in range(len(keys)):
48 end = keys[i]
49 nel.append(self.a[start:end] != self.b[start:end])
50 start = end # for next time round loop
51 comb += nes.eq(Cat(*nel))
52
53 comb += eqc.gates.eq(self.partition_points.as_sig())
54 comb += eqc.neqs.eq(nes)
55 comb += self.output.eq(eqc.outputs)
56
57
58 return m