fix some borked imports

[ieee754fpu.git] / src / ieee754 / add / test_inputgroup.py

diff --git a/src/ieee754/add/test_inputgroup.py b/src/ieee754/add/test_inputgroup.py
index 96de216fc6c8c32bb45c2091f45f5502e96b478b..b487043983d02dc9161c9c2064d3b1d7d101683e 100644 (file)
--- a/src/ieee754/add/test_inputgroup.py
+++ b/src/ieee754/add/test_inputgroup.py
@@ -3,7 +3,7 @@ from nmigen import Module, Signal
 from nmigen.compat.sim import run_simulation
 from nmigen.cli import verilog, rtlil
 
-from inputgroup import InputGroup
+from ieee754.add.inputgroup import InputGroup
 
 
 def testbench(dut):