format code

[ieee754fpu.git] / src / ieee754 / fpadd / test / test_fpadd_pipe_32.py

diff --git a/src/ieee754/fpadd/test/test_fpadd_pipe_32.py b/src/ieee754/fpadd/test/test_fpadd_pipe_32.py
index c84b8c39d124156feaafd8930dc28a4c2166a2b4..3591a77e3f163faaddcdeff6ad073a1e4f3043f3 100644 (file)
--- a/src/ieee754/fpadd/test/test_fpadd_pipe_32.py
+++ b/src/ieee754/fpadd/test/test_fpadd_pipe_32.py
@@ -1,7 +1,7 @@
 """ test of FPADDMuxInOut
 """
 
-from ieee754.fpadd.pipeline import (FPADDMuxInOut,)
+from ieee754.fpadd.pipeline import FPADDMuxInOut
 from ieee754.fpcommon.test.case_gen import run_pipe_fp
 from ieee754.fpcommon.test import unit_test_single
 from ieee754.fpadd.test.add_data32 import regressions
@@ -13,7 +13,7 @@ from operator import add
 def test_pipe_fp32():
     dut = FPADDMuxInOut(32, 4)
     run_pipe_fp(dut, 32, "add", unit_test_single, Float32,
-                   regressions, add, 10)
+                regressions, add, 10)
 
 
 if __name__ == '__main__':