Convert add and sub to return PartitionedSignal

[ieee754fpu.git] / src / ieee754 / part / partsig.py

diff --git a/src/ieee754/part/partsig.py b/src/ieee754/part/partsig.py
index 9e6e78b6ffc7965e72af7a1f4ea4a23405072740..f09b972a4c93e3a07e1f869c1f9a8ff16952743a 100644 (file)
--- a/src/ieee754/part/partsig.py
+++ b/src/ieee754/part/partsig.py
@@ -163,7 +163,9 @@ class PartitionedSignal:
         comb += pa.a.eq(op1)
         comb += pa.b.eq(op2)
         comb += pa.carry_in.eq(carry)
-        return (pa.output, pa.carry_out)
+        result = PartitionedSignal.like(self)
+        comb += result.sig.eq(pa.output)
+        return result, pa.carry_out
 
     def sub_op(self, op1, op2, carry=~0):
         op1 = getsig(op1)
@@ -174,7 +176,9 @@ class PartitionedSignal:
         comb += pa.a.eq(op1)
         comb += pa.b.eq(~op2)
         comb += pa.carry_in.eq(carry)
-        return (pa.output, pa.carry_out)
+        result = PartitionedSignal.like(self)
+        comb += result.sig.eq(pa.output)
+        return result, pa.carry_out
 
     def __add__(self, other):
         result, _ = self.add_op(self, other, carry=0)