looking for replacements of the hard-coded control blocks
[ieee754fpu.git] / src / add / multipipe.py
2019-04-08 Luke Kenneth Casso... forgot to rename i_valid_logic() to i_valid_test in...
2019-03-28 Luke Kenneth Casso... multi-out temporary, simplify graphs
2019-03-28 Luke Kenneth Casso... try tidyup on multi-in ready/valid logic
2019-03-28 Luke Kenneth Casso... create base multi-in ports function
2019-03-28 Luke Kenneth Casso... move flexible ports fn to MultiOutControlBase
2019-03-28 Luke Kenneth Casso... reorg, move similar classes to multipipe
2019-03-28 Luke Kenneth Casso... move PriorityCombMuxInPipe to multipipe
2019-03-27 Luke Kenneth Casso... add comments
2019-03-27 Luke Kenneth Casso... remove unneeded data_value
2019-03-27 Luke Kenneth Casso... reorganise MultiOutPipe, seems to be near-identical...
2019-03-27 Luke Kenneth Casso... add start of outputmux pipe test
2019-03-27 Luke Kenneth Casso... update comments
2019-03-27 Luke Kenneth Casso... rename MultiIn/Out to MultiIn/OutControlBase
2019-03-27 Luke Kenneth Casso... rename connect_in/out to _connect_in/out in multipipe
2019-03-26 Luke Kenneth Casso... add multi-out pipe module (untested)
2019-03-26 Luke Kenneth Casso... rename PipelineBase to MultiInControl in multi-input...
2019-03-26 Luke Kenneth Casso... create multipipe from former multi-input Pipeline