switch to exact version of cython
[ieee754fpu.git] / src / ieee754 / div_rem_sqrt_rsqrt / div_pipe.py
2019-07-28 Luke Kenneth Casso... whitespace
2019-07-23 Luke Kenneth Casso... remove debug prints
2019-07-22 Luke Kenneth Casso... continuing experimentation
2019-07-22 Luke Kenneth Casso... config/setup/imports
2019-07-22 Luke Kenneth Casso... add missing ispec/ospecs
2019-07-22 Luke Kenneth Casso... whitespace
2019-07-22 Luke Kenneth Casso... more imports / syntax errors
2019-07-22 Luke Kenneth Casso... set up DivPipeCoreConfig back in FPDIVMuxInOut, syntax...
2019-07-22 Luke Kenneth Casso... fix imports
2019-07-21 Luke Kenneth Casso... match mantissa width up in div config
2019-07-21 Luke Kenneth Casso... create get_core_config function
2019-07-21 Luke Kenneth Casso... start also putting in additional DivPipe*Stage usage
2019-07-21 Luke Kenneth Casso... add preliminary DivPipeCalculateStage and DivPipeFinalStage
2019-07-21 Luke Kenneth Casso... add "z" to DivPipeBaseData class so that sign and expon...
2019-07-14 Jacob Lifshayfinish implementing DivPipeConfig.__init__
2019-07-14 Jacob Lifshayswitch pspec from dict to PipelineSpec
2019-07-07 Jacob Lifshaymisc code cleanups
2019-07-07 Jacob Lifshaymove DivPipe(?!Core).* classes to div_pipe.py