The_Mission.mdwn

   1 # Trustable Hardware
   2
   3 > We believe a computer should be safe to use, and this starts with a
   4 > safe processor.
   5
   6 # The Mission
   7
   8 - to provide a libre, secure and transparently developed hybrid CPU VPU
   9   GPU architecture to the world.
  10 - to maximize the degree of trust a customer or user can place in
  11   products using our processor designs.
  12 - through significantly reduced product development costs and time to
  13   market, incentivise mass volume appliance manufacturers to ensure
  14   that end-users of their products enjoy the same level of access to
  15   full Board Support Package source code and Reference Designs that
  16   they have, including for the processor hardware design.
  17 - to disincentivise Tivoisation, the deployment of DRM and other lockout
  18   techniques that interfere with end-user trust in the products that
  19   they legitimately own.
  20
  21 To accomplish this we:
  22
  23 - use collaborative techniques
  24 - operate entirely transparently
  25 - invite developers and experts around the world to contribute without NDAs
  26 - invite inventors to contribute relevant patents to patent pools (OIN)
  27
  28 # The Means:
  29
  30 - provide the customer the **freedom to study, modify, and redistribute**
  31   the full SoC source, from HDL, through BIOS, boot loader, to drivers and OS.
  32 - engage in **full transparency** at every level of the development,
  33   right from the inception through to delivery of silicon.  no exceptions.
  34 - listen to **constructive input** from world-leading industry experts,
  35   engineers and enthusiasts alike, in real-time, without NDAs creating
  36   artificial barriers to communication and hampering success.
  37
  38 # The Market:
  39
  40  - chromebooks
  41  - smartphones
  42  - tablets
  43  - industrial boards
  44  - single-board computers (like the Raspberry Pi)
  45  - wearables
  46  - CV capable flight controller for lightweight drones
  47  - whatever you want
  48
  49 # The Products:
  50
  51 - our first target (Dec 2020): a single-core dual-issue 180nm 64-bit
  52   "demo" QFP chip that will also be a saleable product in the "Embedded"
  53   space (Arduino, STM32F, Ingenic jz4720).
  54 - a full quad core SoC: 800mhz, dual issue, 4-wide FP32, Hybrid CPU /
  55   GPU / VPU [and later an ML inference core], comparable to the Allwinner
  56   64 in capability.
  57 - Products based on customer - and client - driven needs and requirements
  58