# Meet the Team

These are our current members

Also, check out [[The_Mission]].

## [[Luke Kenneth Casson Leighton|lkcl]]

* Hardware Experience: assembly-level programming, gate-level
  circuit design, PCB design, reverse-engineering, embedded systems
  design and programming, software engineering, standards development,
  libre project management and more.
* Ethical Technology Specialist.  Identifies socio-economic imbalances and
  works out if there's an ethical way in which technology can help.  If that
  technology doesn't exist, creates it.
* Interests: varied and including particle physics, Medieval and Folk music, and writing poems.
* website: [[http://lkcl.net]]
* github: doesn't have one (because github is a proprietary non-free service),
  runs his own git servers, manages projects (several), entirely in a libre
  fashion, including managing the server(s).
* Availability: full-time

## [[Jacob Lifshay|programmerjake]]

* FOSS Software Developer, Hardware Designer, Original Author of Kazan (one of our GPU drivers, also a software-rendered Vulkan implementation that works on most CPUs)
* Built a working RV32I CPU and VGA core that runs a 3D game in 3 weeks: [[https://github.com/programmerjake/rv32]]
* Built an algebraic numbers library: https://crates.io/crates/algebraics
* Built a (non-official) reference implementation of IEEE 754-2019 (binary floating-point): [[https://crates.io/crates/simple-soft-float]]
* Interests: Computer Graphics, Compilers, Simulation, Rust-lang, Anime, Astrophysics, Electronics, Computer Design, Chemistry, Nuclear Physics, Cellular Automatons, Video Game Software Engineering, High-performance Computing
* GitHub: [[https://github.com/programmerjake]]
* Availability: full-time

## [[Tobias Platen|tplaten]]

* Copyleft Software Developer, Hardware Designer and Reverse Engineer
* Interests: varied and including speech synthesis and cosplay.
* website: [[https://www.platen-software.de/tobias/]]
* github: doesn't have one using notabug instead
  [[https://notabug.org/isengaara]]
* Availability: Outside normal working hours.

## Yann Guidon (whygee)

* Experience: Processor architecture : designer of
    F-CPU project since 1999 [[http://f-cpu.org]]
    YASEP (16- & 32-bits real-time controller)  [[http://yasep.org]]
    YGREC8 (8-bits microcontroller)   [[http://ygrec8.com]]
* Interests: Designer of electronic circuits circuits for industrial
  and artistic applications with dedicated workshop for PCB prototyping
  with wide range of technologies Algorithmics, including data
  compression, signal processing (sound & picture), optimisations,
  design for test...

## [[Lauri Kasanen|lauri]]

* Embedded software engineer
* Interests: niche platforms, embedded, servers, graphics
* github: [[https://github.com/clbr]]
* Availability: part-time

## [[Veera Kumar|veera]]

* Software developer, programmer and small system administrator
* Knowledge in using Redhat, Fedora, Debian and few others
* Have experience building a custom Linux distribution based on LFS/CLFS
* Experience in Shell, C, Awk, Perl, Python, Lua, HTML, CSS, PHP
* Develop websites, run VPS on Linux
* Build open source softwares from source and test and use it
* Website [[http://www.vkten.in]]
* Availability: part-time

## [[Jock Tanner|jock_tanner]]

* Expertise: Python developer, full-stack web developer (6+ years)
* My code: [[https://github.com/dmelnichuk/]], [[https://github.com/jock-tanner/]]
* GNU/Linux user/administrator
* Hobbies: electronics, real-time systems, digital music & sound processing, embedded systems, FPGA, retro computing
* Availability: ~20hrs/week
* Time zone: UTC+10:00

## [[Alain Williams|addw]]

Alain's website: <http://phcomp.co.uk>

## [[Cesar Strauss|Cesar_Strauss]]

* Experience: Data acquisition and control for scientific instruments
* Programming of microcontrolers and FPGAs
* Digital circuit design
* Availability: Outside normal working hours.

## [[Sanjay A Menon|Sanjay]]

* Skills: Verilog, C/C++, Python, TCL & PERL
* Github Profile: [[https://github.com/Sanjay-A-Menon]]
* LinkedIn Profile: [[https://www.linkedin.com/in/sanjay-menon-91791815a]]
* Availability: ~6hrs/week

## [[Samuel A Falvo II]]

* Experience in amateur HDL projects (Kestrel-3 homebrew computer
   concept; VDC-II core), Verilog (but not System Verilog), newbie at PCB
   design.  Extensive experience with test-driven development, Python,
   assembly language for a wide variety of CPUs including RISC-V, and Forth.
   Very comfortable with nMigen, but still learning things.
* Interests: Forth, Common Lisp, Scheme, assembly language,
   {Astro|Semiconductor-}physics, astronomy, martial arts, furry (character: black dragon; name: "Vertigo").
* Websites:
  - https://hackaday.io/project/170581-vdc-ii ,
  - https://kestrelcomputer.github.io/kestrel/ ,
  - http://chiselapp.com/user/kc5tja/repository/kestrel-3/index
* Public Repositories:
  - https://github.com/sam-falvo ,
  - https://github.com/kestrelcomputer
* Availability: approximately 20 hrs/wk, circumstances permitting.

## [[Alex Oliva|lxo]]

* Experience: GCC, binutils, glibc, GNU autotools, Free Software activism.
* website: [[https://www.fsfla.org/~lxoliva/]]
* Availability: 10+hrs/week

## [[Richard Wilbur|rwilbur]]

* Interests:  Libre in hardware and software, low-power, efficiency
* Hardware Experience:  High-speed digital(comb. & FSM), PLD(PALASM), FPGA(VHDL), low-power, analog video, I2C, DDC, PCI, RS-232/422/485, SOC board bring-up, PCB layout, VLSI gate design
* Software Experience:  optimization, 3D geometry transformations, simulation, atomic & multi-threaded, PCI auto-configuration, drivers (serial HW, MPEG encoder/decoder(TS generation/consumption), GPS), OpenGL vertex shader, SQL db, network protocol design, test-driven dev, PCI BIOS, fixed-point division
* Languages:  C, C++, Python, asm, bash, PERL, BASIC, Forth, ruby
* Architectures:  6502/10, 68k, x86_64, PPC, i960, SPARC
* Website:  [[https://launchpad.net/~richard-wilbur]]
* Availability:  10+hrs/week, more is negotiable
* Timezone:  UTC-07:00 (DST UTC-06:00, 2nd Sun of Mar-1st Sun of Nov)

## [[Dmitry Selyutin|ghostmansd]]

* Interests: OS development, fishing, classical antiquity
* Languages: C, C++, Python
* FW experience: system programming
* Availability: depends on a week (0..10+hrs/week)

## [[Kyle Lehman|klehman]]

* Languages: C/C++, Java, Python, SQL, assembly
* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation 
* Other interests: Nearly anything that floats, flies, or has an engine with wheels

## [[Andrey Miroshnikov|andreym]]
* Languages: C, Python, Verilog, Shell script
* Interests: Analogue/digital electronics, RF, mobile comms, compilers,
FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design
* Experience: FPGA/ASIC system validation, instrument automation using
VISA, PCB design (KiCAD, Altium)
* Other interests: King James Bible, Russian Synodal Bible, Languages,
Philosophy, History, Orienteering
* Availability: Mon-Fri 8am-6pm UTC, Sat-Sun intermittent
* IRC: octavius | [email](mailto:andrey at technepisteme.xyz)

## [[Manikandan Nagarajan|Manik]]

* Languages: Verilog HDL, VHDL, C, Python & TCL
* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
* Availability: 8~10hrs/week

## [[Toshaan Bharvani|toshywoshy]]
* Languages: C, C++, Golang, Python, Ruby, Assembly, Java, JavaScript, bash, ksh, ...
* Interests: Software on optimized hardware, compilers, FPGAs, microarchitecture, Unix OSs, Linux, Enterprise Software
* Experience: Software, Firmware, BIOS/UEFI, Microcode, Services
* Other interests: History, Mechanics, Tinkering
* Availability: Full-time
* IRC: toshywoshy

## [[Sadoon Albader|sadoon]]
* Computer engineer specializing in hardware design
* Home system administrator
* Knowledge in Debian, Gentoo, and Arch
* Languages: C, VHDL, SystemVerilog
* Built my own (now unmaintained) powerpc and ppc64 ports for Debian 11, now working on [Debian 12](https://libre-soc.org/SFFS/debian_bootstrap/) and [Gentoo](https://libre-soc.org/SFFS/gentoo_bootstrap/) POWER9 SFFS
* Experience: Intel FPGA design, HDL optimization, Software to HDL conversion (SPP), Microprocessor Architecture
* Other Interests: Religion, History, Automobiles
* Website: [[https://albader.co]]
* Availability: Tuesdays & Wednesdays 3-8PM UTC, Friday ~12-8PM UTC

## [[Shriya Sharma|shriya]]
* TODO

## Object Automation

### [[oa/madan]]

* Interests: Programming in Python and Knowledge of ML algorithms and NLP
* Availability: 5 hours per week
* Statistician

### [[oa/gautham]]

* Interests: Digital System Design, PCB Layout, Programming, Machine Learning
* Programming Languages: Verilog, C, C++, Python
* Availability: ~8-10 hours/week

### [[oa/adithya]]

* Interests:Digital System Design,PCB layout, Programming, Machine Learning, IoT
* Programming Languages: Verilog, C, C++, Java, Python3, Julia
* Availability: ~10hrs per week

### [[oa/Niranjan]]

* Interests: Digital System Design, PCB Layout, Programming
* Programming Languages: Verilog, C, C++, Python
* Availability: ~8-10 hours/week

### [[oa/Abhishek]]

* Interests: HPC, embedded systems, Digital system design 
* Programming Languages: C, Python, Java, VHDL
* Availability: ~8-10 hours/week

### [[oa/Sukhanshu D]]

* Experience: SOC Verification Intern, Digital Design
* Programming Languages: Python, Verilog, Ng-spice
* Availability: 4-6 hours per week

### [[oa/Mehul N]]

* Interests: Digital Design, Verification, IC Fabrication
* Programming Languages: Verilog, System Verilog, UVM
* Availability: ~ 6-8 hours/week
* Experience: SoC Verification Intern, Research Intern at KIS

## 3mdeb

## Former Members

### [[Cole Poirier|cole]]