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diff --git a/3d_gpu/architecture/dynamic_simd/slice.mdwn b/3d_gpu/architecture/dynamic_simd/slice.mdwn
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+++ b/3d_gpu/architecture/dynamic_simd/slice.mdwn
@@ -122,3 +122,14 @@ So, slicing bits `3:6` of a 32-bit element of `a` must, because we have to match
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+
+# Partitioned SIMD Design implications
+
+Slice is the very first of the entire suite of sub-modules of Partitioned
+SimdSignal that requires (and propagates) fixed element widths.  All other
+sub-modules have up until this point been a fixed *overall* width where the
+element widths adapt to completely fill the entire underlying Signal.
+
+Given that this new width context is then passed through to other SimdSignals,
+the entire SimdSignal suite has to adapt to this change in requirements.
+It is however not as big an adaptation as it first seems.