From: lkcl <lkcl@web>
Date: Sat, 27 Feb 2021 16:32:02 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~111
X-Git-Url: https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff_plain;h=afc5d7a34f211e5e3a65079b23de6edc37546a6b

---

diff --git a/openpower/sv/fclass.mdwn b/openpower/sv/fclass.mdwn
index 398e861a0..2890bd91e 100644
--- a/openpower/sv/fclass.mdwn
+++ b/openpower/sv/fclass.mdwn
@@ -2,7 +2,7 @@
 
 In SV just as with [[sv/fcvt]] single precision is to be considered half-of-elwidth precision.  Thus when elwidth=FP32 fptstsp will test half that precision, at FP16.
 
-xvtstdcsp v3.0B p768
+based on xvtstdcsp v3.0B p768
 
 | 0.5| 6..10 |11.15| 16.20 | 21...30 |31|  name   |
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