--- /dev/null
+% Glossary
+
+% In the main documentation text I have not tagged every use of the glossary
+% entries below, I have tagged the first in a chapter, or first use for some
+% number of paragraphs.
+
+% Put the definition of terms of the glossary terms in here
+% Try to keep in alphabetic order - for easier editing, they will
+% be generated (in the PDF) in alphabetic order regardless of the order below
+
+% To use one do something like: \gls{PowerPC}
+% Note that the entries are case sensitive.
+
+% Having an entry below will not make it appear in the glossary,
+% it will only appear if it is used, eg: \gls{PowerPC}
+
+% How to use:
+% GlsName The text that should be used in the document, eg: \gls{GlsName}
+% GlsText The text that will be shown in the document in place of \gls{GlsName}
+% GlsName and GlsText can be different but you will probably want
+% to make them the same.
+% \newglossaryentry{GlsName}
+% {
+% name=GlsText,
+% description={
+% See: \href{}{}
+% }
+% }
+
+% See:
+% https://en.wikibooks.org/wiki/LaTeX/Glossary
+% http://tug.ctan.org/macros/latex/contrib/glossaries/glossariesbegin.pdf
+
+% An empty entry to use as a template:
+% \newglossaryentry{}
+% {
+% name=,
+% description={
+% See: \href{}{}
+% }
+% }
+
+% BUG: the glossary entries have a '.' after them that I am not expecting.
+
+% BEWARE: the documentation may need to be built more than once for all of the
+% entries below to appear. This seems to be if an entry is only mentioned in another
+% glossary entry.
+
+\newglossaryentry{Binutils}
+{
+ name=Binutils,
+ description={
+ GNU Binary Utilities is part of the toolchain used for creating and managing
+ binary objects (compiled code).
+ Used with \gls{gcc}.
+ See: \href{https://www.gnu.org/software/binutils/}{GNU web site}
+ }
+}
+
+\newglossaryentry{CPU}
+{
+ name=CPU,
+ description={
+ Central Processing Unit.
+ The brain of a conventional computer that executes general purpose programs.
+ Contrast with \gls{GPU} and \gls{VPU}.
+% See: \href{}{}
+ }
+}
+
+\newglossaryentry{CSR}
+{
+ name=CSR,
+ description={
+ Control and Status Register.
+ A special register that records CPU status and processing options.
+ One important option to this project is that the special instructions
+ that we have created will be recognised.
+% See: \href{}{}
+ }
+}
+
+\newglossaryentry{FPGA}
+{
+ name=FPGA,
+ description={
+ Field-programmable gate array.
+ An integrated circuit where the circuitry can be reconfigured.
+ See: \href{https://en.wikipedia.org/wiki/Field-programmable_gate_array}{Wikipedia}
+ }
+}
+
+\newglossaryentry{gcc}
+{
+ name=gcc,
+ description={
+ \gls{GNU} Compiler Collection.
+ A popular open source compiler for C (\& related), Fortran, Ada \& Go and able to generate
+ object code for many \gls{ISA}s including \gls{PowerPC}.
+ See: \href{https://en.wikipedia.org/wiki/GNU_Compiler_Collection}{Wikipedia}
+ }
+}
+
+
+\newglossaryentry{GNU}
+{
+ name=GNU,
+ description={
+ The GNU project is a large collection of free software.
+ It provides many of the core programs that are used by many \gls{Linux} distributions.
+ See: \href{https://www.gnu.org/}{GNU website}
+ }
+}
+
+\newglossaryentry{GPU}
+{
+ name=GPU,
+ description={
+ Graphics processing unit.
+ Special purpose processor optimised for graphics and image generation,
+ often able to run in parallel -- the same instructions on
+ different data at the same time.
+ Contrast with \gls{CPU} and \gls{VPU}.
+ See: \href{https://en.wikipedia.org/wiki/Graphics_processing_unit}{Wikipedia}
+ }
+}
+
+\newglossaryentry{IEEE754}
+{
+ name=IEEE754,
+ description={
+ A popular standard way of representing and manipulating floating point numbers.
+ Initiated by the Institute of Electrical and Electronics Engineers in 1985.
+ Different precisions from 16 to 256 bits are described.
+ See: \href{https://en.wikipedia.org/wiki/IEEE_754}{Wikipedia}
+ }
+}
+
+\newglossaryentry{ISA}
+{
+ name=ISA,
+ description={
+ Instruction Set Architecture.
+ An abstract model of a computer a definition that includes: registers, memory access,
+ input/output, data types, CPU instruction set.
+ Everything that is needed to be able to create programs to run on the machine.
+ See: \href{https://en.wikipedia.org/wiki/Instruction_set_architecture}{Wikipedia}
+ }
+}
+
+\newglossaryentry{JIT}
+{
+ name=JIT,
+ description={
+ Just In Time compilation.
+ Translate when the program runs, only when needed.
+ See: \href{https://en.wikipedia.org/wiki/Just-in-time_compilation}{Wikipedia}
+ }
+}
+
+\newglossaryentry{Linux}
+{
+ name=Linux,
+ description={
+ A free kernel on which free operating systems and specialised environments are built.
+ Linux is found all the way for small, embedded systems, to desktops, to servers
+ and the world's biggest super computers.
+ It runs on many \gls{ISA}s and supports a huge variety of peripheral devices.
+ Linux was inspired by Unix and is upwards compatible with POSIX.
+ See: \href{https://www.linuxfoundation.org/}{Linux Foundation}
+ }
+}
+
+
+\newglossaryentry{LLVM}
+{
+ name=LLVM,
+ description={
+ A compiler and related toolchain.
+ An open source and able to compileAda, C, C++, D, Delphi, Fortran, Haskell, Julia, Objective-C, Rust, and Swift
+ able to generate object code for many \gls{ISA}s including \gls{PowerPC}.
+ See: \href{https://en.wikipedia.org/wiki/LLVM}{Wikipedia}
+ }
+}
+
+
+\newglossaryentry{PowerPC}
+{
+ name=PowerPC,
+ description={
+ A \gls{RISC} \gls{ISA} created in 1991 by Apple, IBM and Motorola.
+ The name is a backronym: Performance Optimization With Enhanced RISC
+ Performance Computing, sometimes abbreviated as PPC or called POWER).
+ See: \href{https://en.wikipedia.org/wiki/PowerPC}{Wikipedia}
+ }
+}
+
+\newglossaryentry{RISC}
+{
+ name=RISC,
+ description={
+ Reduced Instruction Set Computer.
+ A computer design philosophy that features simple but fast instructions,
+ often with many registers.
+ See: \href{https://en.wikipedia.org/wiki/Reduced_instruction_set_computer}{Wikipedia}
+ }
+}
+
+\newglossaryentry{RISCV}
+{
+ name=RISC-V,
+ description={
+ An open sourced \gls{RISC} \gls{ISA} started in 2010 at the University of California, Berkeley.
+ See: \href{https://en.wikipedia.org/wiki/RISC-V}{Wikipedia}
+ }
+}
+
+\newglossaryentry{SoC}
+{
+ name=SoC,
+ description={
+ System on a Chip.
+ An integrated circuit that has (almost all) the components needed to
+ make a fully running system.
+ See: \href{https://en.wikipedia.org/wiki/System_on_a_chip}{Wikipedia}
+ }
+}
+
+\newglossaryentry{SPARC}
+{
+ name=SPARC,
+ description={
+ A \gls{RISC} \gls{ISA} created by Sun Microsystems.
+ See: \href{https://en.wikipedia.org/wiki/SPARC}{Wikipedia}
+ }
+}
+
+\newglossaryentry{SupervisorMode}
+{
+ name=Supervisor Mode,
+ description={
+ A privileged CPU state where the program can execute instructions or otherwise
+ do things that a non-privileged program would not be allowed to do.
+% See: \href{}{}
+ }
+}
+
+\newglossaryentry{VPU}
+{
+ name=VPU,
+ description={
+ Video Processing Unit and Visual Processing Unit and Vector Processing Unit
+ Contrast with \gls{CPU} and \gls{GPU}.
+% See: \href{}{}
+ }
+}
+
+\newglossaryentry{Z80}
+{
+ name=Zilog Z80,
+ description={
+ An 8 bit processor produced by the Zilog Inc in 1986.
+ It is compatible with the Intel 8080 processor.
+ See: \href{https://en.wikipedia.org/wiki/Z80}{Wikiedia}
+ }
+}
+
+% Other entries to consider:
+% emulator
+% namespace
+% MSB
+% PCR
+% ISANS
+% SIE
+% MISA
+% WARL
+% WLRL
projects / libresoc-isa-manual.git / blobdiff