Latest additions

[libresoc-isa-manual.git] / powerpc-add / src / isamux.tex

diff --git a/powerpc-add/src/isamux.tex b/powerpc-add/src/isamux.tex
index 8d7a48581927e8f22f0bb3452438325499a68cb6..43524215b8e36defa457199e25787f79cc1826fe 100644 (file)
--- a/powerpc-add/src/isamux.tex
+++ b/powerpc-add/src/isamux.tex
@@ -1,7 +1,7 @@
 % ISAMUX
 % https://bugs.libre-soc.org/show_bug.cgi?id=214
 
-\chapter{Introduction}
+\chapter{ISAMUX}
 
 \paragraph{}
 
@@ -91,7 +91,7 @@ Bits 24 thru 31 are for custom usage.
 
 \item
 
-bit 6 (\textbf{B}) is endian-selection: LE/BE
+bit 6 (\textbf{B}) is \gls{endian}-selection: \gls{LE}/\gls{BE}
 
 \end{itemize}
 
@@ -147,7 +147,8 @@ Foreign Arch Mode
 
 \item
 
-when bit 0 is 1, \textbf{Foreign arch} mode is selected.
+when bit 0 (the \gls{LSB}) is 1, \textbf{Foreign arch} mode is selected.
+% part of the reason for having LSB here is to avoid glossary ordering problems
 
 \item
 
@@ -155,7 +156,7 @@ Bits 1 thru 7 are a table of foreign arches.
 
 \item
 
-when the MSB is 1, this is for custom use.
+when the \gls{MSB} is 1, this is for custom use.
 
 \item
 
@@ -256,14 +257,15 @@ state!) which is quite severely burdensome and getting exceptionally complex.
 
 \paragraph{}
 
-Switching \gls{CSR}, PC (and potentially SP) and other state on a NS change in the
+Switching \gls{CSR}, \gls{PC} (and potentially \gls{SP}) and other state on a NS change in the
 RISCV unary NS therefore needs to be done wisely and responsibly, i.e.
 minimised!
 
 \paragraph{}
 
 To be discussed. Context
-href=https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/x-uFZDXiOxY/27QDW5KvBQAJ
+href=https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/\\
+x-uFZDXiOxY/27QDW5KvBQAJ
 
 
 \section{Privileged Modes / Traps} \label{privtraps}
@@ -275,7 +277,7 @@ another called \textbf{TRAP-ISANS}
 These mirrors the ISANS CSR, and, on a trap, the current ISANS in
 that privilege level is atomically
 transferred into LAST-ISANS by the hardware, and ISANS in that trap
-is set to TRAP-ISANS.  Hardware is \textbf{only then} permitted to modify the PC to
+is set to TRAP-ISANS.  Hardware is \textbf{only then} permitted to modify the \gls{PC} to
 begin execution of the trap.
 
 \paragraph{}
@@ -365,7 +367,7 @@ the trap handler routine is written.
 
 \paragraph{}
 
-Open question: see https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/IAhyOqEZoWA/BM0G3J2zBgAJ
+Open question: see https://groups.google.com/a/groups.riscv.org/d/msg/isa\-dev/IAhyOqEZoWA/BM0G3J2zBgAJ
 
 \begin{verbatim}
 trap_entry(x_cause)
@@ -383,7 +385,7 @@ trap_exit(x_cause):
 }
 \end{verbatim}
 
-\subsection{Is this like \gls{MISA} ?} \label{misa}
+\subsection{Is this like MISA ?} \label{misa}
 
 \paragraph{}
 
@@ -395,7 +397,7 @@ No.
 
 \item
 
-MISA's space is entirely taken up (and running out).
+\gls{MISA}'s space is entirely taken up (and running out).
 
 \item