soc/integration/csr_bridge: use registered version only when SDRAM is present.
[litex.git] / .travis.yml
1 jobs:
2 include:
3 - os: linux
4 dist: xenial
5 language: python
6 python: "3.6"
7 - os: linux
8 dist: xenial
9 language: python
10 python: "3.7"
11 - os: linux
12 dist: xenial
13 language: python
14 python: "3.8"
15 - os: osx
16 osx_image: xcode10.2 # Includes Python 3.7
17 language: shell
18 - os: windows
19 language: shell
20 before_install:
21 - choco info python3
22 - choco install python3
23 - export PATH=/c/Python38/:$PATH
24 - cp -a /c/Python38/python.exe /c/Python38/python3.exe
25 allow_failures:
26 - os: windows
27 language: shell
28
29 install:
30 # Get Migen / LiteX / Cores
31 - cd ~/
32 - pip3 install requests
33 - cp $TRAVIS_BUILD_DIR/litex_setup.py .
34 - python3 litex_setup.py init install
35 # Install the LiteX version being tested
36 - cd $TRAVIS_BUILD_DIR
37 - python3 setup.py install
38
39 before_script:
40 # Get RISC-V toolchain
41 - cd ~/
42 - python3 litex_setup.py gcc
43 - ls $PWD/riscv64-*/bin/
44 - export PATH=$PATH:$(echo $PWD/riscv64-*/bin/)
45 - riscv64-unknown-elf-gcc --version
46
47 script:
48 - cd $TRAVIS_BUILD_DIR
49 - python3 setup.py test