soc/cores/cpu/vexriscv_smp enable dynamic litedram datawidth
authorDolu1990 <charles.papon.90@gmail.com>
Wed, 29 Jul 2020 10:40:16 +0000 (12:40 +0200)
committerDolu1990 <charles.papon.90@gmail.com>
Wed, 29 Jul 2020 10:40:16 +0000 (12:40 +0200)
commit023ab15ec1bd335ccccce30c67c65550984e398e
treea8eacee1aa28b541ff240a99da78a304839a3618
parente5cd5d5466d757e094f2d13a3e8f271db3089e11
soc/cores/cpu/vexriscv_smp enable dynamic litedram datawidth
litex/soc/cores/cpu/vexriscv_smp/core.py