soc: add initial DMA bus support (optionally provided by CPU(s) for cache coherency).

soc: add initial DMA bus support (optionally provided by CPU(s) for cache coherency).

When provided, the modules doing DMA shall connect the DMA to the dma_bus to allow the CPU(s) to manage cache coherency
and avoid the manual cache flushes.

This has been tested with VexRiscv SMP and LiteSDCard doing DMA while loading Linux binaries.