add micron n25q 128mb QSPI device to table of

recognised ICs for speed-up

diff --git a/coldboot/coldboot.c b/coldboot/coldboot.c
index e5d97a1e3a34ae8e331d5e0628c7057276f42cee..86318ddc4634633fd923dbae3012f96aa232f33e 100644 (file)
--- a/coldboot/coldboot.c
+++ b/coldboot/coldboot.c
@@ -229,11 +229,6 @@ int main(void) {
     puts("\r\n");
 
     if (ftr & SYS_REG_INFO_HAS_SPI_FLASH) {
-        // speed up the QSPI to at least a sane level
-        crank_up_qspi_level1();
-        // run at saner level
-        host_spi_flash_init();
-
         puts("SPI Offset: ");
         spi_offs = readl(SYSCON_BASE + SYS_REG_SPI_INFO);
         uart_writeuint32(spi_offs);
@@ -269,6 +264,17 @@ int main(void) {
           if ((i & 0x7) == 0x7) puts("\r\n");
         }
         puts("\r\n");
+
+        // speed up the QSPI to at least a sane level
+        crank_up_qspi_level1();
+        // run at saner level
+        host_spi_flash_init();
+
+        puts("SPI Offset: ");
+        spi_offs = readl(SYSCON_BASE + SYS_REG_SPI_INFO);
+        uart_writeuint32(spi_offs);
+        puts("\r\n");
+
         /*
         for (i=0;i<256;i++) {
           tmp = readb((unsigned long)&(qspi_bytes[i]));

diff --git a/coldboot/micron_n25q_flash.h b/coldboot/micron_n25q_flash.h
index 66712c86119fec53e72285853e3bb4aff1befb18..1768757dec075286937180dfcf8249f662ea61a4 100644 (file)
--- a/coldboot/micron_n25q_flash.h
+++ b/coldboot/micron_n25q_flash.h
@@ -3,9 +3,12 @@
 // Released under the terms of the GPL v3
 // See the LICENSE file for full details
 
-uint32_t micron_n25q_spi_device_ids[] = { 0x20ba2010, 0x20ba2110 };
+uint32_t micron_n25q_spi_device_ids[] = { 0x20ba2010, 0x20ba2110,
+                                          0x20ba1810 };
 
-const char *micron_n25q_spi_device_names[] = { "Micron N25Q 512Mb", "Micron N25Q 1024Mb" };
+const char *micron_n25q_spi_device_names[] = { "Micron N25Q 512Mb",
+                                                "Micron N25Q 1024Mb",
+                                                "Micron N25Q 128Mb" };
 
 #define MICRON_N25Q_SPI_FAST_READ_DUMMY_CLOCK_CYCLES 10
 

diff --git a/src/ls2.py b/src/ls2.py
index db1cf375388b198132276e7664100836e7f8f6fa..493442b02807a3b3f9eb5833266acc0efe30039e 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -871,7 +871,7 @@ def build_platform(fpga, firmware):
         clk_freq = 50e6
         dram_clk_freq = 100e6
     if fpga == 'arty_a7':
-        clk_freq = 23.0e6 # urrr "working" with the QSPI core (25 mhz does not)
+        clk_freq = 25.0e6 # urrr "working" with the QSPI core (25 mhz does not)
     if fpga == 'ulx3s':
         clk_freq = 40.0e6
     if fpga == 'orangecrab':
@@ -1106,7 +1106,7 @@ def build_platform(fpga, firmware):
 
     if toolchain == 'yosys_nextpnr':
         # add --seed 2 to arty a7 compile-time options
-        os.environ['NMIGEN_nextpnr_opts'] = '--seed 6'
+        os.environ['NMIGEN_nextpnr_opts'] = '--seed 1'
 
     if platform is not None:
         # build and upload it