nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir SPIR-V dest sizes match the input, while nir is always int32. Insert casts from the nir op to the expected SPIR-V dest. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
nir: rename nir_op_fne to nir_op_fneu It was always fneu but naming it fne causes confusion from time to time. So lets rename it. Later we also want to add other unordered and fne, this is a smaller preparation for that. Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6377>
nir/vtn: Support OpOrdered and OpUnordered opcodes Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6355>
nir/vtn: Handle LessOrGreater deprecated opcode Reviewed-by Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6355>
nir/vtn: Support SpvOpIsFinite via fisfinite Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6355>
nir/vtn: Support SpvOpIsNormal via fisnormal Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6355>
spirv: Add better checks for SSA value types Primarily, we check for two things: 1. That we only ever add SSA values via vtn_push_ssa_value and vtn_copy_value. 2. That the type of the SSA value matches the SPIR-V destination type. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv/alu: Use vtn_push_ssa_value Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv: Add a vtn_get_nir_ssa helper Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv: Add a vtn_push_nir_ssa helper This makes it easy to write a simple NIR SSA value Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv: Add a helpers for getting types of values Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv: Use nir_bany/ball for OpAny/All Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
spirv: Clean up OpSignBitSet For some reason, we were doing a signed shift vectors and an unsigned shift for scalars. We then plug it into i2b so it should make no difference whatsoever. The fact that we're doing different things for vectors vs. scalars is bonkers. Let's simplify the code a bit. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
nir/vtn: Add support for 8 and 16 vector ball/bany Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
nir/spirv: Translate SPIR-V to NIR for new INTEL_shader_integer_functions2 opcodes v2: Rebase on 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes") v3: Add missing SpvOpUCountTrailingZerosINTEL case to switch in vtn_handle_body_instruction. Remove stray semicolon in vtn_nir_alu_op_for_spirv_opcode. Use umin instead of umax for SpvOpUCountTrailingZerosINTEL "lowering" in vtn_handle_alu. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
spirv: Implement NoSignedWrap and NoUnsignedWrap decorations When handling the specified ALU operations, check for the decorations and set nir_alu_instr no_signed_wrap and no_unsigned_wrap flags accordingly. v2: Add a glsl_base_type_is_unsigned_integer() helper. (Karol) v3: Rename helper to glsl_base_type_is_uint(). v4: Use two flags, so we don't need the helper anymore. (Connor) v5: Pass alu directly to handle function. (Jason) Reviewed-by: Karol Herbst <kherbst@redhat.com> [v3] Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
nir: Drop imov/fmov in favor of one mov instruction The difference between imov and fmov has been a constant source of confusion in NIR for years. No one really knows why we have two or when to use one vs. the other. The real reason is that they do different things in the presence of source and destination modifiers. However, without modifiers (which many back-ends don't have), they are identical. Now that we've reworked nir_lower_to_source_mods to leave one abs/neg instruction in place rather than replacing them with imov or fmov instructions, we don't need two different instructions at all anymore. Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Rob Clark <robdclark@chromium.org>
vtn: handle bitcast with pointer src/dest v2: use vtn_push_ssa and vtn_ssa_value Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
spirv: fix SpvOpBitSize return value. The spir-v spec says this returns a bool. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
spirv: Rename vtn_decoration literals to operands Decorations (and ExecutionModes) can have not only literals, but also Ids associated with them. So rename the field to the more general name "Operand" used by the spec. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>