freedreno/ir3: rework setup_{input,output} to make struct varyings work Rework setup_{input,output} to be called during emit_intrinsic, in a way which allows struct/array/matrix type varyings to work. This allows turnip to pass dEQP-VK.glsl.linkage.varying.struct.* Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>
tu: Implement multiview pipeline state Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5720>
freedreno/a6xx: Add multiview registers Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5720>
freedreno/ir3: Simpify the immediates from an array of vec4 to array of dwords. We usually had to split the idx/swiz out of the dword index anyway. Note that incidentally, immediates_size now increments in vec4s instad of 4*vec4s. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
freedreno/ir3: Merge the redundant immediate_idx/immediates_count fields I got tripped up again with the index vs count vs size fields and I'd rather we didn't store the redundant info. Settle on immediates_count as "how many dwords of immediates we have" Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
turnip: fix SP_HS_UNKNOWN_A831 value for A650 Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
turnip: use patchControlPoints for HS_INPUT_SIZE value It should be calculated from patchControlPoints, not tcs_vertices_out. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
tu: Fix hangs for DS with no output Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
tu: Enable VK_EXT_depth_clip_enable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6047>
tu: Use common guardband helper Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>
tu: Enable VK_EXT_shader_stencil_export This passes the grand total of 3 CTS tests (2 actually enabled due to missing D32_SFLOAT_S8_UINT support) under dEQP-VK.pipeline.shader_stencil_export.* Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
freedreno/regs: update a6xx PC regs Update some registers in the 0x9800-0xa000 range. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
freedreno/regs: update a6xx VPC regs Update some registers in the 0x9000-0x95ff range. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
freedreno/regs: update a6xx GRAS registers Update some registers in the 0x8000-0x87ff range. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5870>
turnip: remove use of tu_cs_entry for draw states The tu_cs_entry struct doesn't match well what we want for SET_DRAW_STATE and CP_INDIRECT_BUFFER (requires extra steps to get iova and size), so start phasing it out. Additionally, use newly added tu_cs_draw_state where it doesn't require any effort (it requires a fixed size, but gets rid of the extra end_sub_stream) Note this also changes the behavior of CmdBindDescriptorSets for compute to emit directly in cmd->cs instead of doing through a CP_INDIRECT. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
turnip: fix inconsistencies with tu6_load_state_size The next patch assumes the correct size is returned in tu6_emit_load_state. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5558>
tu: Don't invalidate irrelevant state when changing pipeline At least in the future this could let us avoid re-emitting gfx/cs constants when the other changes. This also matches what the blob does. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
freedreno/a6xx: Rename and document HLSQ_UPDATE_CNTL It turns out that this clears CP_LOAD_STATE6 packets, including disabling any pending loads for SS6_INDIRECT/SS6_BINDLESS (these loads don't actually happen until the draw itself, and I'm not sure if they happen if the state is unused by the shader) and marking constants and UBO descriptors loaded with SS6_DIRECT as invalid. It's used very differently from HLSQ_UPDATE_CNTL on a4xx from whence the name came, and unlike on a4xx it's not readable, so this probably doesn't line up with HLSQ_UPDATE_CNTL on a4xx. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5877>
turnip: drop GS clear path We didn't know how to write layer id without GS, since that's the only way to do it through VK/GL, and the blob didn't implement this clear case (and failed cases where it was absolutely necessary). However now we know how to set it after some educated guesses and looking at tess/geom traces, so the GS path can be dropped. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>
turnip: clean up primitive output state We only need to emit one set of primitive output registers. This may differ from the blob, because it seems to try to allow using the same pipeline with tess/geom enabled/disabled. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5790>