intel/compiler: move extern C functions out of namespace brw brw_compile_gs and brw_compile_tcs are extern C functions, but are defined inside of brw namespace, which somehow works but confuses Eclipse CDT's code analysis. Move these functions out of brw namespace and fix references to objects from brw namespace. Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
intel/compiler: use the same name for nir shaders in brw_compile_* functions Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
intel/compiler: match brw_compile_* declarations with their definitions Current state confuses Eclipse CDT's code analysis. Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
nir: get ffma support from NIR options for nir_lower_flrp This also fixes the inverted last parameter of nir_lower_flrp in most drivers. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
intel/fs: add hint how to get more info when shader validation fails Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>
anv: Set alignments on UBO/SSBO root derefs This doesn't really do anything for us today. One day, I suppose we could use it to do something with wide loads with non-uniform offsets. The big reason to do this is to get better testing to make sure that NIR doesn't blow up on the deref paths. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
intel/nir: Stop using nir_lower_vars_to_scratch Instead, we do a limited indirect deref lowering and then use nir_lower_vars_to_explicit_types and nir_lower_explicit_io to lower it as if it were SSBO or global memory access. Among other things, this should enable pointer arithmetic on local variables. Fun! The only shader-db change from this change on ICL was a few tiny cycle count changes in 7 Aztec Ruins compute shaders. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
nir/lower_indirect_derefs: Add a threshold Instead of always lowering everything, we add a threshold such that if the total indirected array size (AoA size) is above that threshold, it won't lower. It's assumed that the driver will sort things out somehow by, for instance, lowering to scratch. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
intel/compiler: Handle all indirect lowering choices in brw_nir.c Since everything flows through NIR and we're doing all of our indirect deref lowering there now, there's no reason to keep making those decisions in brw_compiler and stuffing them in the GLSL compiler structs. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
intel/nir: Lower load_num_work_groups to 32-bit if needed For OpenCL-style kernels, this builtin is 64-bit. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
intel/fs: Use a single untyped surface read for load_num_work_groups There's no good reason to split this into three. Sure, CS indirects are only guaranteed by the spec to be DWORD aligned, but that's all untyped surface reads require anyway. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
intel/fs: Don't copy-propagate stride=0 sources into ddx/ddy This can come up if, for instance, the shader does a derivative of a uniform or flat input. Ideally, NIR would use divergence analysis to get rid of the derivative in this case but it doesn't right now. This fixes a crash in F1 2017. Cc: mesa-stable@lists.freedesktop.org Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com> Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6564>
anv: Patch constant data pointers into shaders with using softpin When we have softpin, we know the address of the shader constant data at shader upload time because it's sitting at the end of the shader. This commit changes ANV to use patch constants to embed the address in the shader patch the right address in at upload time. This allows us to avoid having to set up a UBO binding on-the-fly for shader constants. This commit uses an A64 message but it's quite possible that we could also use an A32 message and make the dataport do the 64-bit add for us. However, load_global is what we have right now so it was easier to just use that. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
intel/fs: Add support for a new load_reloc_const intrinsic Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
intel/eu: Add a mechanism for emitting relocatable constant MOVs Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>