96236103d04dbd5c76c66d0ad91e351380bb9995
[mesa.git] / src / amd / addrlib / gfx9 / gfx9addrlib.h
1 /*
2 * Copyright © 2017 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ************************************************************************************************************************
29 * @file gfx9addrlib.h
30 * @brief Contgfx9ns the Gfx9Lib class definition.
31 ************************************************************************************************************************
32 */
33
34 #ifndef __GFX9_ADDR_LIB_H__
35 #define __GFX9_ADDR_LIB_H__
36
37 #include "addrlib2.h"
38 #include "coord.h"
39
40 namespace Addr
41 {
42 namespace V2
43 {
44
45 /**
46 ************************************************************************************************************************
47 * @brief GFX9 specific settings structure.
48 ************************************************************************************************************************
49 */
50 struct Gfx9ChipSettings
51 {
52 struct
53 {
54 // Asic/Generation name
55 UINT_32 isArcticIsland : 1;
56 UINT_32 isVega10 : 1;
57 UINT_32 isRaven : 1;
58 UINT_32 reserved0 : 29;
59
60 // Display engine IP version name
61 UINT_32 isDce12 : 1;
62 UINT_32 isDcn1 : 1;
63 UINT_32 reserved1 : 29;
64
65 // Misc configuration bits
66 UINT_32 metaBaseAlignFix : 1;
67 UINT_32 depthPipeXorDisable : 1;
68 UINT_32 reserved2 : 30;
69 };
70 };
71
72 /**
73 ************************************************************************************************************************
74 * @brief GFX9 data surface type.
75 ************************************************************************************************************************
76 */
77 enum Gfx9DataType
78 {
79 Gfx9DataColor,
80 Gfx9DataDepthStencil,
81 Gfx9DataFmask
82 };
83
84 /**
85 ************************************************************************************************************************
86 * @brief This class is the GFX9 specific address library
87 * function set.
88 ************************************************************************************************************************
89 */
90 class Gfx9Lib : public Lib
91 {
92 public:
93 /// Creates Gfx9Lib object
94 static Addr::Lib* CreateObj(const Client* pClient)
95 {
96 VOID* pMem = Object::ClientAlloc(sizeof(Gfx9Lib), pClient);
97 return (pMem != NULL) ? new (pMem) Gfx9Lib(pClient) : NULL;
98 }
99
100 protected:
101 Gfx9Lib(const Client* pClient);
102 virtual ~Gfx9Lib();
103
104 virtual BOOL_32 HwlIsStandardSwizzle(
105 AddrResourceType resourceType,
106 AddrSwizzleMode swizzleMode) const
107 {
108 return m_swizzleModeTable[swizzleMode].isStd ||
109 (IsTex3d(resourceType) && m_swizzleModeTable[swizzleMode].isDisp);
110 }
111
112 virtual BOOL_32 HwlIsDisplaySwizzle(
113 AddrResourceType resourceType,
114 AddrSwizzleMode swizzleMode) const
115 {
116 return IsTex2d(resourceType) && m_swizzleModeTable[swizzleMode].isDisp;
117 }
118
119 virtual BOOL_32 HwlIsThin(
120 AddrResourceType resourceType,
121 AddrSwizzleMode swizzleMode) const
122 {
123 return ((IsTex2d(resourceType) == TRUE) ||
124 ((IsTex3d(resourceType) == TRUE) &&
125 (m_swizzleModeTable[swizzleMode].isZ == FALSE) &&
126 (m_swizzleModeTable[swizzleMode].isStd == FALSE)));
127 }
128
129 virtual BOOL_32 HwlIsThick(
130 AddrResourceType resourceType,
131 AddrSwizzleMode swizzleMode) const
132 {
133 return (IsTex3d(resourceType) &&
134 (m_swizzleModeTable[swizzleMode].isZ || m_swizzleModeTable[swizzleMode].isStd));
135 }
136
137 virtual ADDR_E_RETURNCODE HwlComputeHtileInfo(
138 const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
139 ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
140
141 virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo(
142 const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn,
143 ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
144
145 virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
146 const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
147 ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const;
148
149 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
150 const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
151 ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
152
153 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
154 const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
155 ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
156
157 virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr(
158 const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
159 ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
160
161 virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
162 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
163 ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) const;
164
165 virtual UINT_32 HwlGetEquationIndex(
166 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
167 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
168
169 virtual ADDR_E_RETURNCODE HwlComputeBlock256Equation(
170 AddrResourceType rsrcType,
171 AddrSwizzleMode swMode,
172 UINT_32 elementBytesLog2,
173 ADDR_EQUATION* pEquation) const;
174
175 virtual ADDR_E_RETURNCODE HwlComputeThinEquation(
176 AddrResourceType rsrcType,
177 AddrSwizzleMode swMode,
178 UINT_32 elementBytesLog2,
179 ADDR_EQUATION* pEquation) const;
180
181 virtual ADDR_E_RETURNCODE HwlComputeThickEquation(
182 AddrResourceType rsrcType,
183 AddrSwizzleMode swMode,
184 UINT_32 elementBytesLog2,
185 ADDR_EQUATION* pEquation) const;
186
187 // Get equation table pointer and number of equations
188 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
189 {
190 *ppEquationTable = m_equationTable;
191
192 return m_numEquations;
193 }
194
195 virtual BOOL_32 IsEquationSupported(
196 AddrResourceType rsrcType,
197 AddrSwizzleMode swMode,
198 UINT_32 elementBytesLog2) const;
199
200 virtual UINT_32 HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode) const
201 {
202 UINT_32 baseAlign;
203
204 if (IsXor(swizzleMode))
205 {
206 if (m_settings.isVega10 || m_settings.isRaven)
207 {
208 baseAlign = GetBlockSize(swizzleMode);
209 }
210 else
211 {
212 UINT_32 blockSizeLog2 = GetBlockSizeLog2(swizzleMode);
213 UINT_32 pipeBits = GetPipeXorBits(blockSizeLog2);
214 UINT_32 bankBits = GetBankXorBits(blockSizeLog2);
215 baseAlign = 1 << (Min(blockSizeLog2, m_pipeInterleaveLog2 + pipeBits+ bankBits));
216 }
217 }
218 else
219 {
220 baseAlign = 256;
221 }
222
223 return baseAlign;
224 }
225
226 virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
227 const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
228 ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const;
229
230 virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
231 const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
232 ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const;
233
234 virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
235 const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
236 ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const;
237
238 virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
239 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
240 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
241
242 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck(
243 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
244
245 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled(
246 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
247 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
248
249 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
250 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
251 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
252
253 // Initialize equation table
254 VOID InitEquationTable();
255
256 ADDR_E_RETURNCODE ComputeStereoInfo(
257 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
258 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut,
259 UINT_32* pHeightAlign) const;
260
261 UINT_32 GetMipChainInfo(
262 AddrResourceType resourceType,
263 AddrSwizzleMode swizzleMode,
264 UINT_32 bpp,
265 UINT_32 mip0Width,
266 UINT_32 mip0Height,
267 UINT_32 mip0Depth,
268 UINT_32 blockWidth,
269 UINT_32 blockHeight,
270 UINT_32 blockDepth,
271 UINT_32 numMipLevel,
272 ADDR2_MIP_INFO* pMipInfo) const;
273
274 VOID GetMetaMiptailInfo(
275 ADDR2_META_MIP_INFO* pInfo,
276 Dim3d mipCoord,
277 UINT_32 numMipInTail,
278 Dim3d* pMetaBlkDim) const;
279
280 Dim3d GetMipStartPos(
281 AddrResourceType resourceType,
282 AddrSwizzleMode swizzleMode,
283 UINT_32 width,
284 UINT_32 height,
285 UINT_32 depth,
286 UINT_32 blockWidth,
287 UINT_32 blockHeight,
288 UINT_32 blockDepth,
289 UINT_32 mipId,
290 UINT_32 log2ElementBytes,
291 UINT_32* pMipTailBytesOffset) const;
292
293 AddrMajorMode GetMajorMode(
294 AddrResourceType resourceType,
295 AddrSwizzleMode swizzleMode,
296 UINT_32 mip0WidthInBlk,
297 UINT_32 mip0HeightInBlk,
298 UINT_32 mip0DepthInBlk) const
299 {
300 BOOL_32 yMajor = (mip0WidthInBlk < mip0HeightInBlk);
301 BOOL_32 xMajor = (yMajor == FALSE);
302
303 if (IsThick(resourceType, swizzleMode))
304 {
305 yMajor = yMajor && (mip0HeightInBlk >= mip0DepthInBlk);
306 xMajor = xMajor && (mip0WidthInBlk >= mip0DepthInBlk);
307 }
308
309 AddrMajorMode majorMode;
310 if (xMajor)
311 {
312 majorMode = ADDR_MAJOR_X;
313 }
314 else if (yMajor)
315 {
316 majorMode = ADDR_MAJOR_Y;
317 }
318 else
319 {
320 majorMode = ADDR_MAJOR_Z;
321 }
322
323 return majorMode;
324 }
325
326 Dim3d GetDccCompressBlk(
327 AddrResourceType resourceType,
328 AddrSwizzleMode swizzleMode,
329 UINT_32 bpp) const
330 {
331 UINT_32 index = Log2(bpp >> 3);
332 Dim3d compressBlkDim;
333
334 if (IsThin(resourceType, swizzleMode))
335 {
336 compressBlkDim.w = Block256_2d[index].w;
337 compressBlkDim.h = Block256_2d[index].h;
338 compressBlkDim.d = 1;
339 }
340 else if (IsStandardSwizzle(resourceType, swizzleMode))
341 {
342 compressBlkDim = Block256_3dS[index];
343 }
344 else
345 {
346 compressBlkDim = Block256_3dZ[index];
347 }
348
349 return compressBlkDim;
350 }
351
352 static const Dim3d Block256_3dS[MaxNumOfBpp];
353 static const Dim3d Block256_3dZ[MaxNumOfBpp];
354
355 static const UINT_32 MipTailOffset256B[];
356
357 static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE];
358
359 // Max number of swizzle mode supported for equation
360 static const UINT_32 MaxSwMode = 32;
361 // Max number of resource type (2D/3D) supported for equation
362 static const UINT_32 MaxRsrcType = 2;
363 // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp)
364 static const UINT_32 MaxElementBytesLog2 = 5;
365 // Almost all swizzle mode + resource type support equation
366 static const UINT_32 EquationTableSize = MaxElementBytesLog2 * MaxSwMode * MaxRsrcType;
367 // Equation table
368 ADDR_EQUATION m_equationTable[EquationTableSize];
369
370 // Number of equation entries in the table
371 UINT_32 m_numEquations;
372 // Equation lookup table according to bpp and tile index
373 UINT_32 m_equationLookupTable[MaxRsrcType][MaxSwMode][MaxElementBytesLog2];
374
375 private:
376 virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(
377 ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
378
379 virtual BOOL_32 HwlInitGlobalParams(
380 const ADDR_CREATE_INPUT* pCreateIn);
381
382 static VOID GetRbEquation(CoordEq* pRbEq, UINT_32 rbPerSeLog2, UINT_32 seLog2);
383
384 VOID GetDataEquation(CoordEq* pDataEq, Gfx9DataType dataSurfaceType,
385 AddrSwizzleMode swizzleMode, AddrResourceType resourceType,
386 UINT_32 elementBytesLog2, UINT_32 numSamplesLog2) const;
387
388 VOID GetPipeEquation(CoordEq* pPipeEq, CoordEq* pDataEq,
389 UINT_32 pipeInterleaveLog2, UINT_32 numPipesLog2,
390 UINT_32 numSamplesLog2, Gfx9DataType dataSurfaceType,
391 AddrSwizzleMode swizzleMode, AddrResourceType resourceType) const;
392
393 VOID GetMetaEquation(CoordEq* pMetaEq, UINT_32 maxMip,
394 UINT_32 elementBytesLog2, UINT_32 numSamplesLog2,
395 ADDR2_META_FLAGS metaFlag, Gfx9DataType dataSurfaceType,
396 AddrSwizzleMode swizzleMode, AddrResourceType resourceType,
397 UINT_32 metaBlkWidthLog2, UINT_32 metaBlkHeightLog2,
398 UINT_32 metaBlkDepthLog2, UINT_32 compBlkWidthLog2,
399 UINT_32 compBlkHeightLog2, UINT_32 compBlkDepthLog2) const;
400
401 virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
402
403 VOID GetMetaMipInfo(UINT_32 numMipLevels, Dim3d* pMetaBlkDim,
404 BOOL_32 dataThick, ADDR2_META_MIP_INFO* pInfo,
405 UINT_32 mip0Width, UINT_32 mip0Height, UINT_32 mip0Depth,
406 UINT_32* pNumMetaBlkX, UINT_32* pNumMetaBlkY, UINT_32* pNumMetaBlkZ) const;
407
408 BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
409
410 Gfx9ChipSettings m_settings;
411 };
412
413 } // V2
414 } // Addr
415
416 #endif
417