radv: Fix threading issue with submission refcounts.
[mesa.git] / src / amd / addrlib / inc / addrtypes.h
1 /*
2 * Copyright © 2007-2019 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40
41 #else
42
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void VOID;
46 #endif
47
48 #if !defined(FLOAT)
49 typedef float FLOAT;
50 #endif
51
52 #if !defined(CHAR)
53 typedef char CHAR;
54 #endif
55
56 #if !defined(INT)
57 typedef int INT;
58 #endif
59
60 #include <stdarg.h> // va_list...etc need this header
61
62 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
63
64 /**
65 ****************************************************************************************************
66 * Calling conventions
67 ****************************************************************************************************
68 */
69 #ifndef ADDR_CDECL
70 #if defined(__GNUC__)
71 #define ADDR_CDECL __attribute__((cdecl))
72 #else
73 #define ADDR_CDECL __cdecl
74 #endif
75 #endif
76
77 #ifndef ADDR_STDCALL
78 #if defined(__GNUC__)
79 #if defined(__amd64__) || defined(__x86_64__)
80 #define ADDR_STDCALL
81 #else
82 #define ADDR_STDCALL __attribute__((stdcall))
83 #endif
84 #else
85 #define ADDR_STDCALL __stdcall
86 #endif
87 #endif
88
89 #ifndef ADDR_FASTCALL
90 #if defined(__GNUC__)
91 #define ADDR_FASTCALL __attribute__((regparm(0)))
92 #else
93 #define ADDR_FASTCALL __fastcall
94 #endif
95 #endif
96
97 #ifndef GC_CDECL
98 #define GC_CDECL ADDR_CDECL
99 #endif
100
101 #ifndef GC_STDCALL
102 #define GC_STDCALL ADDR_STDCALL
103 #endif
104
105 #ifndef GC_FASTCALL
106 #define GC_FASTCALL ADDR_FASTCALL
107 #endif
108
109 #if defined(__GNUC__)
110 #define ADDR_INLINE static inline // inline needs to be static to link
111 #else
112 // win32, win64, other platforms
113 #define ADDR_INLINE __inline
114 #endif // #if defined(__GNUC__)
115
116 #if defined(__amd64__) || defined(__x86_64__) || defined(__i386__)
117 #define ADDR_API ADDR_FASTCALL // default call convention is fast call
118 #else
119 #define ADDR_API
120 #endif
121
122 /**
123 ****************************************************************************************************
124 * Global defines used by other modules
125 ****************************************************************************************************
126 */
127 #if !defined(TILEINDEX_INVALID)
128 #define TILEINDEX_INVALID -1
129 #endif
130
131 #if !defined(TILEINDEX_LINEAR_GENERAL)
132 #define TILEINDEX_LINEAR_GENERAL -2
133 #endif
134
135 #if !defined(TILEINDEX_LINEAR_ALIGNED)
136 #define TILEINDEX_LINEAR_ALIGNED 8
137 #endif
138
139 /**
140 ****************************************************************************************************
141 * Return codes
142 ****************************************************************************************************
143 */
144 typedef enum _ADDR_E_RETURNCODE
145 {
146 // General Return
147 ADDR_OK = 0,
148 ADDR_ERROR = 1,
149
150 // Specific Errors
151 ADDR_OUTOFMEMORY,
152 ADDR_INVALIDPARAMS,
153 ADDR_NOTSUPPORTED,
154 ADDR_NOTIMPLEMENTED,
155 ADDR_PARAMSIZEMISMATCH,
156 ADDR_INVALIDGBREGVALUES,
157
158 } ADDR_E_RETURNCODE;
159
160 /**
161 ****************************************************************************************************
162 * @brief
163 * Neutral enums that define tile modes for all H/W
164 * @note
165 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
166 * ADDR_TM_2D_TILED_XTHICK
167 *
168 ****************************************************************************************************
169 */
170 typedef enum _AddrTileMode
171 {
172 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
173 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels
174 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles
175 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles
176 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles
177 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4
178 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16
179 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles
180 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap
181 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4
182 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16
183 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
184 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices
185 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
186 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap
187 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick
188 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI
189 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI
190 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI
191 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size
192 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only
193 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only
194 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
195 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
196 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
197 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
198 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
199 } AddrTileMode;
200
201 /**
202 ****************************************************************************************************
203 * @brief
204 * Neutral enums that define swizzle modes for Gfx9+ ASIC
205 * @note
206 *
207 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource
208 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resource
209 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource
210 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resource
211 *
212 * ADDR_SW_*_Z For GFX9:
213 - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask
214 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
215 For GFX10:
216 - represents Z-order swizzle mode for depth/stencil/FMask
217 * ADDR_SW_*_S For GFX9+:
218 - represents standard swizzle mode defined by MS
219 * ADDR_SW_*_D For GFX9:
220 - for 2D resource, represents a swizzle mode for displayable resource
221 * - for 3D resource, represents a swizzle mode which places each slice in order & pixel
222 For GFX10:
223 - for 2D resource, represents a swizzle mode for displayable resource
224 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
225 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
226 * ADDR_SW_*_R For GFX9:
227 - 2D resource only, represents a swizzle mode for rotated displayable resource
228 For GFX10:
229 - represents a swizzle mode for render target resource
230 *
231 ****************************************************************************************************
232 */
233 typedef enum _AddrSwizzleMode
234 {
235 ADDR_SW_LINEAR = 0,
236 ADDR_SW_256B_S = 1,
237 ADDR_SW_256B_D = 2,
238 ADDR_SW_256B_R = 3,
239 ADDR_SW_4KB_Z = 4,
240 ADDR_SW_4KB_S = 5,
241 ADDR_SW_4KB_D = 6,
242 ADDR_SW_4KB_R = 7,
243 ADDR_SW_64KB_Z = 8,
244 ADDR_SW_64KB_S = 9,
245 ADDR_SW_64KB_D = 10,
246 ADDR_SW_64KB_R = 11,
247 ADDR_SW_RESERVED0 = 12,
248 ADDR_SW_RESERVED1 = 13,
249 ADDR_SW_RESERVED2 = 14,
250 ADDR_SW_RESERVED3 = 15,
251 ADDR_SW_64KB_Z_T = 16,
252 ADDR_SW_64KB_S_T = 17,
253 ADDR_SW_64KB_D_T = 18,
254 ADDR_SW_64KB_R_T = 19,
255 ADDR_SW_4KB_Z_X = 20,
256 ADDR_SW_4KB_S_X = 21,
257 ADDR_SW_4KB_D_X = 22,
258 ADDR_SW_4KB_R_X = 23,
259 ADDR_SW_64KB_Z_X = 24,
260 ADDR_SW_64KB_S_X = 25,
261 ADDR_SW_64KB_D_X = 26,
262 ADDR_SW_64KB_R_X = 27,
263 ADDR_SW_VAR_Z_X = 28,
264 ADDR_SW_RESERVED4 = 29,
265 ADDR_SW_RESERVED5 = 30,
266 ADDR_SW_VAR_R_X = 31,
267 ADDR_SW_LINEAR_GENERAL = 32,
268 ADDR_SW_MAX_TYPE = 33,
269 } AddrSwizzleMode;
270
271 /**
272 ****************************************************************************************************
273 * @brief
274 * Neutral enums that define image type
275 * @note
276 * this is new for address library interface version 2
277 *
278 ****************************************************************************************************
279 */
280 typedef enum _AddrResourceType
281 {
282 ADDR_RSRC_TEX_1D = 0,
283 ADDR_RSRC_TEX_2D = 1,
284 ADDR_RSRC_TEX_3D = 2,
285 ADDR_RSRC_MAX_TYPE = 3,
286 } AddrResourceType;
287
288 /**
289 ****************************************************************************************************
290 * @brief
291 * Neutral enums that define resource heap location
292 * @note
293 * this is new for address library interface version 2
294 *
295 ****************************************************************************************************
296 */
297 typedef enum _AddrResrouceLocation
298 {
299 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
300 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
301 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
302 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
303 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
304 ADDR_RSRC_LOC_MAX_TYPE = 5,
305 } AddrResrouceLocation;
306
307 /**
308 ****************************************************************************************************
309 * @brief
310 * Neutral enums that define resource basic swizzle mode
311 * @note
312 * this is new for address library interface version 2
313 *
314 ****************************************************************************************************
315 */
316 typedef enum _AddrSwType
317 {
318 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
319 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
320 ADDR_SW_D = 2, // Resource basic swizzle mode is Display
321 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized
322 ADDR_SW_L = 4, // Resource basic swizzle mode is Linear
323 ADDR_SW_MAX_SWTYPE
324 } AddrSwType;
325
326 /**
327 ****************************************************************************************************
328 * @brief
329 * Neutral enums that define mipmap major mode
330 * @note
331 * this is new for address library interface version 2
332 *
333 ****************************************************************************************************
334 */
335 typedef enum _AddrMajorMode
336 {
337 ADDR_MAJOR_X = 0,
338 ADDR_MAJOR_Y = 1,
339 ADDR_MAJOR_Z = 2,
340 ADDR_MAJOR_MAX_TYPE = 3,
341 } AddrMajorMode;
342
343 /**
344 ****************************************************************************************************
345 * AddrFormat
346 *
347 * @brief
348 * Neutral enum for SurfaceFormat
349 *
350 ****************************************************************************************************
351 */
352 typedef enum _AddrFormat {
353 ADDR_FMT_INVALID = 0x00000000,
354 ADDR_FMT_8 = 0x00000001,
355 ADDR_FMT_4_4 = 0x00000002,
356 ADDR_FMT_3_3_2 = 0x00000003,
357 ADDR_FMT_RESERVED_4 = 0x00000004,
358 ADDR_FMT_16 = 0x00000005,
359 ADDR_FMT_16_FLOAT = ADDR_FMT_16,
360 ADDR_FMT_8_8 = 0x00000007,
361 ADDR_FMT_5_6_5 = 0x00000008,
362 ADDR_FMT_6_5_5 = 0x00000009,
363 ADDR_FMT_1_5_5_5 = 0x0000000a,
364 ADDR_FMT_4_4_4_4 = 0x0000000b,
365 ADDR_FMT_5_5_5_1 = 0x0000000c,
366 ADDR_FMT_32 = 0x0000000d,
367 ADDR_FMT_32_FLOAT = ADDR_FMT_32,
368 ADDR_FMT_16_16 = 0x0000000f,
369 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16,
370 ADDR_FMT_8_24 = 0x00000011,
371 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24,
372 ADDR_FMT_24_8 = 0x00000013,
373 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8,
374 ADDR_FMT_10_11_11 = 0x00000015,
375 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11,
376 ADDR_FMT_11_11_10 = 0x00000017,
377 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10,
378 ADDR_FMT_2_10_10_10 = 0x00000019,
379 ADDR_FMT_8_8_8_8 = 0x0000001a,
380 ADDR_FMT_10_10_10_2 = 0x0000001b,
381 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c,
382 ADDR_FMT_32_32 = 0x0000001d,
383 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32,
384 ADDR_FMT_16_16_16_16 = 0x0000001f,
385 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16,
386 ADDR_FMT_RESERVED_33 = 0x00000021,
387 ADDR_FMT_32_32_32_32 = 0x00000022,
388 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32,
389 ADDR_FMT_RESERVED_36 = 0x00000024,
390 ADDR_FMT_1 = 0x00000025,
391 ADDR_FMT_1_REVERSED = 0x00000026,
392 ADDR_FMT_GB_GR = 0x00000027,
393 ADDR_FMT_BG_RG = 0x00000028,
394 ADDR_FMT_32_AS_8 = 0x00000029,
395 ADDR_FMT_32_AS_8_8 = 0x0000002a,
396 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b,
397 ADDR_FMT_8_8_8 = 0x0000002c,
398 ADDR_FMT_16_16_16 = 0x0000002d,
399 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16,
400 ADDR_FMT_32_32_32 = 0x0000002f,
401 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32,
402 ADDR_FMT_BC1 = 0x00000031,
403 ADDR_FMT_BC2 = 0x00000032,
404 ADDR_FMT_BC3 = 0x00000033,
405 ADDR_FMT_BC4 = 0x00000034,
406 ADDR_FMT_BC5 = 0x00000035,
407 ADDR_FMT_BC6 = 0x00000036,
408 ADDR_FMT_BC7 = 0x00000037,
409 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038,
410 ADDR_FMT_APC3 = 0x00000039,
411 ADDR_FMT_APC4 = 0x0000003a,
412 ADDR_FMT_APC5 = 0x0000003b,
413 ADDR_FMT_APC6 = 0x0000003c,
414 ADDR_FMT_APC7 = 0x0000003d,
415 ADDR_FMT_CTX1 = 0x0000003e,
416 ADDR_FMT_RESERVED_63 = 0x0000003f,
417 ADDR_FMT_ASTC_4x4 = 0x00000040,
418 ADDR_FMT_ASTC_5x4 = 0x00000041,
419 ADDR_FMT_ASTC_5x5 = 0x00000042,
420 ADDR_FMT_ASTC_6x5 = 0x00000043,
421 ADDR_FMT_ASTC_6x6 = 0x00000044,
422 ADDR_FMT_ASTC_8x5 = 0x00000045,
423 ADDR_FMT_ASTC_8x6 = 0x00000046,
424 ADDR_FMT_ASTC_8x8 = 0x00000047,
425 ADDR_FMT_ASTC_10x5 = 0x00000048,
426 ADDR_FMT_ASTC_10x6 = 0x00000049,
427 ADDR_FMT_ASTC_10x8 = 0x0000004a,
428 ADDR_FMT_ASTC_10x10 = 0x0000004b,
429 ADDR_FMT_ASTC_12x10 = 0x0000004c,
430 ADDR_FMT_ASTC_12x12 = 0x0000004d,
431 ADDR_FMT_ETC2_64BPP = 0x0000004e,
432 ADDR_FMT_ETC2_128BPP = 0x0000004f,
433 } AddrFormat;
434
435 /**
436 ****************************************************************************************************
437 * AddrDepthFormat
438 *
439 * @brief
440 * Neutral enum for addrFlt32ToDepthPixel
441 *
442 ****************************************************************************************************
443 */
444 typedef enum _AddrDepthFormat
445 {
446 ADDR_DEPTH_INVALID = 0x00000000,
447 ADDR_DEPTH_16 = 0x00000001,
448 ADDR_DEPTH_X8_24 = 0x00000002,
449 ADDR_DEPTH_8_24 = 0x00000003,
450 ADDR_DEPTH_X8_24_FLOAT = 0x00000004,
451 ADDR_DEPTH_8_24_FLOAT = 0x00000005,
452 ADDR_DEPTH_32_FLOAT = 0x00000006,
453 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007,
454
455 } AddrDepthFormat;
456
457 /**
458 ****************************************************************************************************
459 * AddrColorFormat
460 *
461 * @brief
462 * Neutral enum for ColorFormat
463 *
464 ****************************************************************************************************
465 */
466 typedef enum _AddrColorFormat
467 {
468 ADDR_COLOR_INVALID = 0x00000000,
469 ADDR_COLOR_8 = 0x00000001,
470 ADDR_COLOR_4_4 = 0x00000002,
471 ADDR_COLOR_3_3_2 = 0x00000003,
472 ADDR_COLOR_RESERVED_4 = 0x00000004,
473 ADDR_COLOR_16 = 0x00000005,
474 ADDR_COLOR_16_FLOAT = 0x00000006,
475 ADDR_COLOR_8_8 = 0x00000007,
476 ADDR_COLOR_5_6_5 = 0x00000008,
477 ADDR_COLOR_6_5_5 = 0x00000009,
478 ADDR_COLOR_1_5_5_5 = 0x0000000a,
479 ADDR_COLOR_4_4_4_4 = 0x0000000b,
480 ADDR_COLOR_5_5_5_1 = 0x0000000c,
481 ADDR_COLOR_32 = 0x0000000d,
482 ADDR_COLOR_32_FLOAT = 0x0000000e,
483 ADDR_COLOR_16_16 = 0x0000000f,
484 ADDR_COLOR_16_16_FLOAT = 0x00000010,
485 ADDR_COLOR_8_24 = 0x00000011,
486 ADDR_COLOR_8_24_FLOAT = 0x00000012,
487 ADDR_COLOR_24_8 = 0x00000013,
488 ADDR_COLOR_24_8_FLOAT = 0x00000014,
489 ADDR_COLOR_10_11_11 = 0x00000015,
490 ADDR_COLOR_10_11_11_FLOAT = 0x00000016,
491 ADDR_COLOR_11_11_10 = 0x00000017,
492 ADDR_COLOR_11_11_10_FLOAT = 0x00000018,
493 ADDR_COLOR_2_10_10_10 = 0x00000019,
494 ADDR_COLOR_8_8_8_8 = 0x0000001a,
495 ADDR_COLOR_10_10_10_2 = 0x0000001b,
496 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c,
497 ADDR_COLOR_32_32 = 0x0000001d,
498 ADDR_COLOR_32_32_FLOAT = 0x0000001e,
499 ADDR_COLOR_16_16_16_16 = 0x0000001f,
500 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020,
501 ADDR_COLOR_RESERVED_33 = 0x00000021,
502 ADDR_COLOR_32_32_32_32 = 0x00000022,
503 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023,
504 } AddrColorFormat;
505
506 /**
507 ****************************************************************************************************
508 * AddrSurfaceNumber
509 *
510 * @brief
511 * Neutral enum for SurfaceNumber
512 *
513 ****************************************************************************************************
514 */
515 typedef enum _AddrSurfaceNumber {
516 ADDR_NUMBER_UNORM = 0x00000000,
517 ADDR_NUMBER_SNORM = 0x00000001,
518 ADDR_NUMBER_USCALED = 0x00000002,
519 ADDR_NUMBER_SSCALED = 0x00000003,
520 ADDR_NUMBER_UINT = 0x00000004,
521 ADDR_NUMBER_SINT = 0x00000005,
522 ADDR_NUMBER_SRGB = 0x00000006,
523 ADDR_NUMBER_FLOAT = 0x00000007,
524 } AddrSurfaceNumber;
525
526 /**
527 ****************************************************************************************************
528 * AddrSurfaceSwap
529 *
530 * @brief
531 * Neutral enum for SurfaceSwap
532 *
533 ****************************************************************************************************
534 */
535 typedef enum _AddrSurfaceSwap {
536 ADDR_SWAP_STD = 0x00000000,
537 ADDR_SWAP_ALT = 0x00000001,
538 ADDR_SWAP_STD_REV = 0x00000002,
539 ADDR_SWAP_ALT_REV = 0x00000003,
540 } AddrSurfaceSwap;
541
542 /**
543 ****************************************************************************************************
544 * AddrHtileBlockSize
545 *
546 * @brief
547 * Size of HTILE blocks, valid values are 4 or 8 for now
548 ****************************************************************************************************
549 */
550 typedef enum _AddrHtileBlockSize
551 {
552 ADDR_HTILE_BLOCKSIZE_4 = 4,
553 ADDR_HTILE_BLOCKSIZE_8 = 8,
554 } AddrHtileBlockSize;
555
556 /**
557 ****************************************************************************************************
558 * AddrPipeCfg
559 *
560 * @brief
561 * The pipe configuration field specifies both the number of pipes and
562 * how pipes are interleaved on the surface.
563 * The expression of number of pipes, the shader engine tile size, and packer tile size
564 * is encoded in a PIPE_CONFIG register field.
565 * In general the number of pipes usually matches the number of memory channels of the
566 * hardware configuration.
567 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
568 * the number of ROP units(? TODO: which registers??)
569 * The enum value = hw enum + 1 which is to reserve 0 for requesting default.
570 ****************************************************************************************************
571 */
572 typedef enum _AddrPipeCfg
573 {
574 ADDR_PIPECFG_INVALID = 0,
575 ADDR_PIPECFG_P2 = 1, /// 2 pipes,
576 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes,
577 ADDR_PIPECFG_P4_16x16 = 6,
578 ADDR_PIPECFG_P4_16x32 = 7,
579 ADDR_PIPECFG_P4_32x32 = 8,
580 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes
581 ADDR_PIPECFG_P8_16x32_8x16 = 10,
582 ADDR_PIPECFG_P8_32x32_8x16 = 11,
583 ADDR_PIPECFG_P8_16x32_16x16 = 12,
584 ADDR_PIPECFG_P8_32x32_16x16 = 13,
585 ADDR_PIPECFG_P8_32x32_16x32 = 14,
586 ADDR_PIPECFG_P8_32x64_32x32 = 15,
587 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes
588 ADDR_PIPECFG_P16_32x32_16x16 = 18,
589 ADDR_PIPECFG_UNUSED = 19,
590 ADDR_PIPECFG_MAX = 20,
591 } AddrPipeCfg;
592
593 /**
594 ****************************************************************************************************
595 * AddrTileType
596 *
597 * @brief
598 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
599 ****************************************************************************************************
600 */
601 typedef enum _AddrTileType
602 {
603 ADDR_DISPLAYABLE = 0, ///< Displayable tiling
604 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling
605 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order
606 ADDR_ROTATED = 3, ///< Rotated displayable tiling
607 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
608 } AddrTileType;
609
610 ////////////////////////////////////////////////////////////////////////////////////////////////////
611 //
612 // Type definitions: short system-independent names for address library types
613 //
614 ////////////////////////////////////////////////////////////////////////////////////////////////////
615
616 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
617
618 #ifndef BOOL_32 // no bool type in C
619 /// @brief Boolean type, since none is defined in C
620 /// @ingroup type
621 #define BOOL_32 int
622 #endif
623
624 #ifndef INT_32
625 #define INT_32 int
626 #endif
627
628 #ifndef UINT_32
629 #define UINT_32 unsigned int
630 #endif
631
632 #ifndef INT_16
633 #define INT_16 short
634 #endif
635
636 #ifndef UINT_16
637 #define UINT_16 unsigned short
638 #endif
639
640 #ifndef INT_8
641 #define INT_8 char
642 #endif
643
644 #ifndef UINT_8
645 #define UINT_8 unsigned char
646 #endif
647
648 #ifndef NULL
649 #define NULL 0
650 #endif
651
652 #ifndef TRUE
653 #define TRUE 1
654 #endif
655
656 #ifndef FALSE
657 #define FALSE 0
658 #endif
659
660 //
661 // 64-bit integer types depend on the compiler
662 //
663 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
664 #define INT_64 long long
665 #define UINT_64 unsigned long long
666
667 #elif defined( _WIN32 )
668 #define INT_64 __int64
669 #define UINT_64 unsigned __int64
670
671 #else
672 #error Unsupported compiler and/or operating system for 64-bit integers
673
674 /// @brief 64-bit signed integer type (compiler dependent)
675 /// @ingroup type
676 ///
677 /// The addrlib defines a 64-bit signed integer type for either
678 /// Gnu/Watcom compilers (which use the first syntax) or for
679 /// the Windows VCC compiler (which uses the second syntax).
680 #define INT_64 long long OR __int64
681
682 /// @brief 64-bit unsigned integer type (compiler dependent)
683 /// @ingroup type
684 ///
685 /// The addrlib defines a 64-bit unsigned integer type for either
686 /// Gnu/Watcom compilers (which use the first syntax) or for
687 /// the Windows VCC compiler (which uses the second syntax).
688 ///
689 #define UINT_64 unsigned long long OR unsigned __int64
690 #endif
691
692 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
693
694 // ADDR64X is used to print addresses in hex form on both Windows and Linux
695 //
696 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
697 #define ADDR64X "llx"
698 #define ADDR64D "lld"
699
700 #elif defined( _WIN32 )
701 #define ADDR64X "I64x"
702 #define ADDR64D "I64d"
703
704 #else
705 #error Unsupported compiler and/or operating system for 64-bit integers
706
707 /// @brief Addrlib device address 64-bit printf tag (compiler dependent)
708 /// @ingroup type
709 ///
710 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
711 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
712 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
713 ///
714 #define ADDR64X "llx" OR "I64x"
715 #define ADDR64D "lld" OR "I64d"
716 #endif
717
718 /// @brief Union for storing a 32-bit float or 32-bit integer
719 /// @ingroup type
720 ///
721 /// This union provides a simple way to convert between a 32-bit float
722 /// and a 32-bit integer. It also prevents the compiler from producing
723 /// code that alters NaN values when assiging or coying floats.
724 /// Therefore, all address library routines that pass or return 32-bit
725 /// floating point data do so by passing or returning a FLT_32.
726 ///
727 typedef union {
728 INT_32 i;
729 UINT_32 u;
730 float f;
731 } ADDR_FLT_32;
732
733 ////////////////////////////////////////////////////////////////////////////////////////////////////
734 //
735 // Macros for controlling linking and building on multiple systems
736 //
737 ////////////////////////////////////////////////////////////////////////////////////////////////////
738 #if defined(_MSC_VER)
739 #if defined(va_copy)
740 #undef va_copy //redefine va_copy to support VC2013
741 #endif
742 #endif
743
744 #if !defined(va_copy)
745 #define va_copy(dst, src) \
746 ((void) memcpy(&(dst), &(src), sizeof(va_list)))
747 #endif
748
749 #endif // __ADDR_TYPES_H__
750